NEe Microcomputers, Inc.
2048 x 8 BIT STATIC CMOS RAM
OESCR IPTI ON
The J-lPD447 is a high speed, low power, 2048 word by 8 bit static CMOS RAM
fabricated using an advanced silicon gate CMOS technology. A unique circuitry tech-
nique makes the J-lPD447 a very low operating power device which requires no clock
or refreshing to operate.
Since the device has two chip enable inputs, it is suited for battery backup applica-
tions. Minimum standby power current is drawn by this device when CE2 equals VCC
independently of the other input levels.
Data Retention is guaranteed at a power supply voltage as low as 2V.
TheJ-lPD447 is packaged in a standard 24-pin dual-in-line package and is plug-in
compatible with 16K EPROMs.
• Single +5V Supply
• Fully Static Operation - No Clock or Refreshing required
• TTL Compatible - All Inputs and Outputs
• Common Data Input and Output Using Three-State Output
• Two Chip Enable Inputs for Battery Operation
• Max Access/Min Cycle Times Down to 120 ns
~ Low Power Dissipation; 45 mA Max Active/100 J-lA Max Standby/
10 J-lA Max Data Retention
• Data Retention Voltage - 2V Min
• Standard 24-Pin Plastic imd Ceramic Packages
• Plug-in Compatible with 16K EPROMs
CE1-m Ch ip Enable Inputs
1/0\-1/08 Data Input/Output
CEI CE2 WE
X H X NOT SELECTED HZ STANDBY
H X X NOT SELECTED HZ ACTIVE
L L L WRITE
L L H READ