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type MCU. MG69L952 Datasheet |
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(Preliminary) MG69L952
8-bit I/O type MCU with LED driver
Features <<<
• Single chip 8-bit micro-controller
• Operating voltage: 1.8V to 3.6V
• Memory:
− Program ROM : 64K bytes
− Data RAM : 256 bytes
• 30 (6 + 24) high drive/sink I/O for LED display.
• 8 general input/output pins (P0.0 to P0.7)
• Two AUD output pins with 8-bit resolution for
audio output
• Built-in RTC (Real Time Clock).
• Built-in low voltage reset (1.8V)
• Built-in two programmable timers and one 16-bit
capture timer
− Timer0, Timer1, Timer 2
• Oscillator:
− Main oscillator (Crystal, Ceramic and RC up
to 4MHz @ 2.0V) operation at crystal or RC
mode is selected by code option
− Sub-oscillator (Crystal and Ceramic up to
100KHz @ 2.0V) operation at crystal mode
only
Application Field
LED Calendar, LED Name Badge, Toy Controller
This document contains information on a new product under development by MEGAWIN. MEGAWIN reserves the right to change or discontinue
this product without notice.
© MEGAWIN Technology Co., Ltd. 2010 All right reserved.
2010/11 version 0.04
MEGAWIN
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General Description
MG69L952 is a cost effective, high
performance 8-bit micro-controller of
MEGAWIN. It integrates an 8-bit CPU core,
ROM, RAM, timers, RTC, I/O ports, and
system control circuits into a single chip. It
is suitable for LED calendar and other
products.
Pad Description <<<
Pad No.
T.B.D
Pad Name
P0.0~P0.7
T.B.D
P1.0~P3.7
T.B.D
P4.0~P4.5
T.B.D
T.B.D
T.B.D
T.B.D
T.B.D
T.B.D
T.B.D
/RES
OSCO, OSCI
X32O, X32I
AUD+, AUD-
GND
VDD
VDD1
I/O Description
I/O General input/output function.
I/O High sink current I/O for LED segment display.
O High drive current output for LED common display.
I System reset pin (low active)
O,I RC or crystal oscillator pins
O,I 32.768KHz crystal oscillator pins
O Audio output for direct drive speaker.
P Ground pin
P Positive power pin for CPU and RTC
P Positive power pin for high drive/sink I/O port
2
MG69L952 Technical Summary
MEGAWIN
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Block Diagram <<<
VDD
GND
OSCI
OSCO
X32I
X32O
Real Time Clock
TM 0,1,2
CPU
Divider
System Clock Generator
I/O, PWM
SRAM / Register
ROM
AUD +
AUD -
Port 0.0 ~ P0.7
Port 1.0 ~ Port 3.7
Port 4.0 ~ 4.5
VDD 1
MEGAWIN
MG69L952 Technical Summary
3
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