PROGRAMMABLE DIVIDER. HMC905LP3E Datasheet

HMC905LP3E DIVIDER. Datasheet pdf. Equivalent

HMC905LP3E Datasheet
Recommendation HMC905LP3E Datasheet
Part HMC905LP3E
Description 6 GHz LOW NOISE PROGRAMMABLE DIVIDER
Feature HMC905LP3E; HMC905LP3E v01.0414 6 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) FREQUENCY DIVIDERS & DETECT.
Manufacture Analog Devices
Datasheet
Download HMC905LP3E Datasheet




Analog Devices HMC905LP3E
HMC905LP3E
v01.0414
6 GHz LOW NOISE PROGRAMMABLE
DIVIDER (N = 1 to 4)
4
4-1
Typical Applications
The HMC905LP3E is ideal for:
• LO Generation with Low Noise Floor
• Software Defined Radios
• Clock Generators
• Fast Switching Synthesizers
• Military Applications
• Test Equipment
• Sensors
Functional Diagram
Features
Low Noise Floor:
-164 dBc/Hz at 10 MHz Offset for N = 4
Programmable Frequency Divider, N = 1, 2, 3 or 4
400 MHz to 6 GHz Input Frequency Range
Up to +6 dBm Output Power
Sleep Mode: Consumes <1 µA
16 Lead 3X3 mm SMT Package: 9mm2
General Description
The HMC905LP3E is a SiGe BiCMOS low noise
programmable frequency divider in a 3x3 mm lead-
less surface mount package. The circuit can be pro-
grammed to divide from N = 1 to N = 4 in the 400 MHz
to 6 GHz input frequency range. The high level out-
put power (up to 6 dBm single ended) with a very low
SSB phase noise and 50% duty cycle makes this
device ideal for low noise clock generation, LO
generation and LO drive applications. Configurable
bias and output power controls allow current
consumption and output power control. The device
incorporates a power down feature, good input
to output isolation and fast start up time. The
HMC905LP3E can be included into fast switching
“ping-pong” applications.
Electrical Specifications, TA = +25° C, Vcc = +3.3V, Zo = 50Ω
Parameter
RF Input Characteristics
RF Input Frequency
RF Input Power
Divider Output Characteristics
Conditions
Single-ended input
Single-ended input
Min. Typ. Max.
Units
400
6000[1]
MHz
0 6 10 dBm
Output Power (Single-ended Out)
-Typically, 50 ohms load resistors connected to Vcc
- 1 bit programmable (CTRL digital signal) [2]
-2
3
6
dBm
SSB Phase Noise @ 10 kHz Offset
SSB Phase Noise @ 100 kHz Offset
SSB Phase Noise @ 10 MHz Offset
Start Up Time
+6 dBm Input Power, 6 GHz input,
Single-Ended Input and Output, Divide-by-4 [3]
EN bit from OFF to ON State (0V to Vcc)
-150
-158
-164
200
dBc/Hz
dBc/Hz
dBc/Hz
ns
Power Down Time
EN bit from ON to OFF State (Vcc to 0V)
20 ns
Setting Time at Division Ratio Change
Delay from divide ratio change
to output frequency change
25 ns
[1] Maximum 5500 MHz in Divide by 2.
[2] See typical supply currents vs. BIAS0, BIAS1, CTRL bits table
[3] See Residual Phase Noise plot
IrrlTiniecgrfaseohpdntrsFeomsemnoaosfatiisirbtrohkingislprirtdayafrunnpiirsdtcnaeairdrsetesihegsb,esuiysdmdttheimebaeredtypldmlbiiAcvtyaranPayeAtadiorlhnroeenaymgsoluooanlDargtrkeofenDrsvtoh:eidamcevr9eAreicwistt7etsopihssie8usepfspop-beulrr2.nelioiacdtSlp5iseepecavu0rreetsetcya-deiinofo3,iyocftnno3atoprhtrida4eboSftienoere3srnuraertaspscsnoupcyrb:peujipcernHFoaatcfirtvttareieientttnoxgt:aoteicnw:rtPmhdiegn9aeehhnrn7rteMgssotls.8eiaonoibwf-cfel2Aieptrh:n.5aooatH9ue0lwoton7g-wntas38oDeotvvi3e-creev2eo7ri,.ct5h3eNCnes0oor.o- r3pFOPA3Ooohpn4rrorpe3danlpiTeectreii:aorocc7treihnO8o,n,1nnaod-2S3lp-eo02lulgpii9vnpyAse-pe4rW@oly7par,a0hthy:ta0i,Pantw•PtdhiR.wOtoOetnoor.w.decBa:ep.odo1hrlax-mo,i8ctn9Cet0l1ii0tn0hoe-e6rAe.d,caNleNmtoArwosmsL:rwOwfAowGonro.d-aadDln,o,agMMloADgAe.0cv02oic01me68s22,-49In10c.6,



Analog Devices HMC905LP3E
HMC905* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
EVALUATION KITS
HMC905LP3E Evaluation Board
DOCUMENTATION
Data Sheet
HMC905 Data Sheet
REFERENCE MATERIALS
Quality Documentation
Package/Assembly Qualification Test Report: 16L 3x3mm
QFN Package (QTR: 11003 REV: 02)
Package/Assembly Qualification Test Report: LP2, LP2C,
LP3, LP3B, LP3C, LP3D, LP3F, LP3G (QTR: 2014-0364)
Semiconductor Qualification Test Report: BiCMOS-C (QTR:
2013-00241)
DESIGN RESOURCES
HMC905 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all HMC905 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.



Analog Devices HMC905LP3E
HMC905LP3E
v01.0414
6 GHz LOW NOISE PROGRAMMABLE
DIVIDER (N = 1 to 4)
Electrical Specifications, TA = +25° C, Vcc = +3.3V, Zo = 50Ω (Continued)
Parameter
Conditions
Isolation SE Input to SE Output
EN bit OFF
Duty Cycle for Differential Mode
Logic Inputs
VIH Input High Voltage
VIL Input Low Voltage
Power Supplies
Vcc
Current Consumption
Analog Supply
(Low Noise LDO for good phase noise -
HMC860LP3E)
Total current vs. BIAS and CTRL bits [1]
Sleep Current
EN = 0V
[1] The bias bits combination BIAS1 BIAS0 = 1 1 is not recommended
Min.
-80
1.5
0
Typ.
50
3.15 3.3
82 100
1
Max.
-30
3.3
0.8
3.45
125
Units
dBc
%
V
V
V
mA
µA
All data plots taken on Evaluation Board (schematic on page 10) single-ended with the unused
output port 50 ohms terminated, Vcc = +3.3V, Ta=+25 °C, except stated otherwise
Input Sensitivity Window
10
5
Recommended
Operating Window
0
-5
Residual Phase Noise
Divide by 1, 2, 3 & 4 [2]
-110
-120
-130
-140
Div By 1
Div By 2
Div By 3
Div By 4
-10
-15
-20
0
BIAS1BIAS0=01
BIAS1BIAS0=00
BIAS1BIAS0=10
Operating Window
123456
INPUT FREQUENCY (GHz)
7
-150
-160
-170
10
100 1000 104
105
106
107
108
OFFSET FREQUENCY (Hz)
Phase Noise for 3 Cascaded
HMC905LP3E from 6 GHz VCO
-10
-30
-50 VCO IN
Div By 4
-70 Div By 16
Div By 64
-90
-110
-130
-150
-170
10
100 1000 104 105 106
OFFSET FREQUENCY (Hz)
[2] Fin = 6 GHz, Pin = 6 dBm, CTRL = 1, BIAS1 BIAS0 = 01
107
Output Phase Noise vs. Input Power
Divide-by-4
-90
-100
-110
-120
-130
-140
-150
-160
Source IN
Div By 4 0dBm
Div By 4 3dBm
Div By 4 6dBm
Div By 4 9dBm
-170
1000
104 105 106
OFFSET FREQUENCY (Hz)
107
IrrlTiniecgrfaseohpdntrsFeomsemnoaosfatiisirbtrohkingislprirtdayafrunnpiirsdtcnaeairdrsetesihegsb,esuiysdmdttheimebaeredtypldmlbiiAcvtyaranPayeAtadiorlhnroeenaymgsoluooanlDargtrkeofenDrsvtoh:eidamcevr9eAreicwistt7etsopihssie8usepfspop-beulrr2.nelioiacdtSlp5iseepecavu0rreetsetcya-deiinofo3,iyocftnno3atoprhtrida4eboSftienoere3srnuraertaspscsnoupcyrb:peujipcernHFoaatcfirtvttareieientttnoxgt:aoteicnw:rtPmhdiegn9aeehhnrn7rteMgssotls.8eiaonoibwf-cfel2Aieptrh:n.5aooatH9ue0lwoton7g-wntas38oDeotvvi3e-creev2eo7ri,.ct5h3eNCnes0oor.o- r3pFOPA3Ooohpn4rrorpe3danlpiTeectreii:aorocc7treihnO8o,n,1nnaod-2S3lp-eo02lulgpii9vnpyAse-pe4rW@oly7par,a0hthy:ta0i,Pantw•PtdhiR.wOtoOetnoor.w.decBa:ep.odo1hrlax-mo,i8ctn9Cet0l1ii0tn0hoe-e6rAe.d,caNleNmtoArwosmsL:rwOwfAowGonro.d-aadDln,o,agMMloADgAe.0cv02oic01me68s22,-49In10c.6,
4
4-2







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)