Reflective Switch. ADRF5130 Datasheet

ADRF5130 Switch. Datasheet pdf. Equivalent

ADRF5130 Datasheet
Recommendation ADRF5130 Datasheet
Part ADRF5130
Description Silicon SPDT / Reflective Switch
Feature ADRF5130; Data Sheet High Power, 44 W Peak, Silicon SPDT, Reflective Switch, 0.7 GHz to 3.5 GHz ADRF5130 FEA.
Manufacture Analog Devices
Datasheet
Download ADRF5130 Datasheet




Analog Devices ADRF5130
Data Sheet
High Power, 44 W Peak, Silicon SPDT,
Reflective Switch, 0.7 GHz to 3.5 GHz
ADRF5130
FEATURES
Reflective, 50 Ω design
Low insertion loss: 0.6 dB typical to 2.0 GHz
High isolation: 50 dB typical to 2.0 GHz
High power handling
RF input power, continuous wave (CW) at TCASE = 85°C
43 dBm maximum operating
46.5 dBm absolute maximum rating
High linearity
0.1 dB compression (P0.1dB): 46 dBm typical
Input third-order intercept (IP3): 68 dBm typical to 2 GHz
ESD ratings
Human body model (HBM): 2 kV, Class 2
Charged device model (CDM): 1.25 kV
Single positive supply: VDD = 5 V
Positive control, TTL-compatible: VCTL = 0 V or VDD
24-lead, 4 mm × 4 mm LFCSP package (16 mm2)
APPLICATIONS
Cellular/4G infrastructure
Wireless infrastructure
Military and high reliability applications
Test equipment
Pin diode replacement
GENERAL DESCRIPTION
The ADRF5130 is a high power, reflective, 0.7 GHz to 3.5 GHz,
silicon, single-pole, double-throw (SPDT) switch in a leadless,
surface-mount package. The switch is ideal for high power and
cellular infrastructure applications, like long-term evolution (LTE)
base stations. The ADRF5130 has high power handling of 43 dBm
(maximum), a low insertion loss of 0.6 dB, input third-order
intercept of 68 dBm (typical), and 0.1 dB compression (P0.1dB)
FUNCTIONAL BLOCK DIAGRAM
VCTL
ADRF5130
RF1 RF2
RFC
Figure 1.
of 46 dBm. On-chip circuitry operates at a single, positive
supply voltage of 5 V and typical supply current of 1.06 mA,
making the ADRF5130 an ideal alternative to pin diode-based
switches.
The device comes in a RoHS compliant, compact, 24-lead, 4 mm ×
4 mm LFCSP package.
Rev. B
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Analog Devices ADRF5130
ADRF5130
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
REVISION HISTORY
5/2018—Rev. A to Rev. B
Change to RFC to RF2 Column, Table 5 ....................................... 7
Updated Outline Dimensions ....................................................... 10
1/2017—Rev. 0 to Rev. A
Changes to Ordering Guide .......................................................... 10
7/2016—Revision 0: Initial Version
Data Sheet
Interface Schematics .....................................................................5
Typical Performance Characteristics ..............................................6
Insertion Loss, Isolation, Return Loss, and IP3 ........................6
Theory of Operation .........................................................................7
Applications Information .................................................................8
Evaluation Board ...........................................................................8
Outline Dimensions ....................................................................... 10
Ordering Guide .......................................................................... 10
Rev. B | Page 2 of 10



Analog Devices ADRF5130
Data Sheet
ADRF5130
SPECIFICATIONS
VDD = 5 V, VCTL = 0 V or VDD, TA = 25°C, 50 Ω system, unless otherwise noted.
Table 1.
Parameter
Symbol Test Conditions/Comments
Min Typ Max Unit
FREQUENCY RANGE
0.7 3.5 GHz
INSERTION LOSS
0.7 GHz to 2.0 GHz
0.6 dB
2.0 GHz to 3.5 GHz
0.7 dB
ISOLATION
RFC to RF1 or RF2 (Worst Case)
0.7 GHz to 2.0 GHz
50 dB
2.0 GHz to 3.5 GHz
46 dB
RF1 to RF2 (Worst Case)
0.7 GHz to 2.0 GHz
51 dB
2.0 GHz to 3.5 GHz
41 dB
RETURN LOSS
RFC
0.7 GHz to 2.0 GHz
23 dB
2.0 GHz to 3.5GHz
17 dB
RFC to RF1 or RF2
0.7 GHz to 2.0 GHz
21 dB
2.0 GHz to 3.5 GHz
17 dB
SWITCHING SPEED
Time
Rise and Fall
tRISE, tFALL 90% to 10% of RF output
155 ns
On and Off
tON, tOFF 50% VCTL to 10% to 90% of RF output
750 ns
RADIO FREQUENCY (RF) SETTLING TIME
50% VCTL to 0.1 dB margin of final RF output
1.8 µs
INPUT POWER
0.1 dB Compression
P0.1dB
46 dBm
INPUT THIRD-ORDER INTERCEPT
IP3 Two-tone input power = 25 dBm/tone
0.7 GHz to 2 GHz
68 dBm
2 GHz to 3.5 GHz
65 dBm
RECOMMENDED OPERATING CONDITIONS
0.7 GHz to 3.5 GHz
Voltage Range
Bias
Control
Maximum RF Input Power
VDD
VCTL
4.5 5.4 V
0 VDD V
TCASE = 105°C
Continuous wave
41 dBm
TCASE = 85°C
Continuous wave
43 dBm
8 dB peak to average ratio (PAR) LTE, average
38 dBm
8 dB PAR LTE, single event (<10 sec), average
44 dBm
TCASE = 25°C
Continuous wave
44.5 dBm
Case Temperature Range
TCASE
−40 +105 °C
DIGITAL INPUT CONTROL VOLTAGE
VDD = 4.5 V to 5.4 V, TCASE = −40°C to +105°C at <1 µA typical
Low Range
High Range
VIL
VIH
0 0.8 V
1.3 5.0 V
SUPPLY CURRENT
IDD VDD = 5 V
1.06 mA
Rev. B | Page 3 of 10







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