SPDT Switch. ADRF5021 Datasheet

ADRF5021 Switch. Datasheet pdf. Equivalent

ADRF5021 Datasheet
Recommendation ADRF5021 Datasheet
Part ADRF5021
Description Silicon SPDT Switch
Feature ADRF5021; Data Sheet FEATURES Ultrawideband frequency range: 9 kHz to 30 GHz Nonreflective 50 Ω design Low ins.
Manufacture Analog Devices
Datasheet
Download ADRF5021 Datasheet




Analog Devices ADRF5021
Data Sheet
FEATURES
Ultrawideband frequency range: 9 kHz to 30 GHz
Nonreflective 50 Ω design
Low insertion loss: 2.0 dB to 30 GHz
High isolation: 60 dB to 30 GHz
High input linearity
1 dB power compression (P1dB): 28 dBm typical
Third-order intercept (IP3): 52 dBm typical
High power handling
24 dBm through path
24 dBm terminated path
ESD sensitivity: Class 1, 1 kV human body model (HBM)
20-terminal, 3 mm × 3 mm land grid array package
No low frequency spurious
Radio frequency (RF) settling time (to 0.1 dB of final RF
output): 6.2 µs
APPLICATIONS
Test instrumentation
Microwave radios and very small aperture terminals (VSATs)
Military radios, radars, electronic counter measures (ECMs)
Broadband telecommunications systems
GENERAL DESCRIPTION
The ADRF5021 is a general-purpose single-pole, double-throw
(SPDT) switch manufactured using a silicon process. It comes
in a 3 mm × 3 mm, 20-terminal land grid array (LGA) package
and provides high isolation and low insertion loss from 9 kHz
to 30 GHz.
9 kHz to 30 GHz,
Silicon SPDT Switch
ADRF5021
FUNCTIONAL BLOCK DIAGRAM
RF2
ADRF5021
RFC
50Ω
50Ω
VSS
EN
CTRL
VDD
RF1
Figure 1.
This broadband switch requires dual supply voltages, +3.3 V
and −2.5 V, and provides CMOS/LVTTL logic-compatible
control.
Rev. A
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Analog Devices ADRF5021
ADRF5021* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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EVALUATION KITS
ADRF5021 Evaluation Board
DOCUMENTATION
Data Sheet
ADRF5021: 9 kHz to 30 GHz, Silicon SPDT Switch Data
Sheet
DESIGN RESOURCES
ADRF5021 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
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Analog Devices ADRF5021
ADRF5021
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Power Derating Curves................................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
REVISION HISTORY
2/2017—Rev. 0 to Rev. A
Changed VEN = 3.3 V to 5 V to VEN = 0 V or 3.3 V to 5 V .......... 3
7/2016—Revision 0: Initial Version
Data Sheet
Interface Schematics .....................................................................6
Typical Performance Characterics ..................................................7
Insertion Loss, Return Loss, and Isolation ................................7
Input Power Compression and Third-Order Intercept (IP3)..8
Theory of Operation .........................................................................9
Applications Information .............................................................. 10
Evaluation Board ........................................................................ 10
Probe Matrix Board ................................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
Rev. A | Page 2 of 12







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