Current-to-Digital ADC. ADAS1135 Datasheet

ADAS1135 ADC. Datasheet pdf. Equivalent

ADAS1135 Datasheet
Recommendation ADAS1135 Datasheet
Part ADAS1135
Description Current-to-Digital ADC
Feature ADAS1135; Data Sheet 256-Channel, 24-Bit, Current-to-Digital ADC Module ADAS1135 FEATURES 256-channel, curre.
Manufacture Analog Devices
Datasheet
Download ADAS1135 Datasheet




Analog Devices ADAS1135
Data Sheet
256-Channel, 24-Bit,
Current-to-Digital ADC Module
ADAS1135
FEATURES
256-channel, current-to-digital converter module
Up to 24-bit resolution
Variable integration time
Fastest integration time: 22.6 kSPS maximum
(44.2 μs minimum) at 20-bit resolution
Low power dissipation: 2.3 mW per channel at any
throughput
Integral linearity
±0.050% of reading, ±1.0 ppm of FSR: all channels active
Very low noise
Simultaneous sampling
No dead time, no loss of charge, 100% charge collection
User adjustable full-scale range
On-board temperature sensor and reference buffer
15 mm × 15 mm, CSP_BGA package
Simple printed circuit board (PCB) design
Integrated capacitors for supply and reference decoupling
0.80 mm pitch BGA allows low cost PCB technology
Support tools
Evaluation board
Reference design with reference layout
FPGA Verilog code
APPLICATIONS
Medical, industrial, and security CT scanner data acquisition
Photodiode sensors
Dosimetry and radiation therapy systems
Optical fiber power monitoring
X-ray detection systems
High channel count data acquisition systems (current or
voltage inputs)
GENERAL DESCRIPTION
The ADAS1135 is a 256-channel, current-to-digital, analog-to-
digital converter (ADC) module. It contains 256 low power, low
noise, low input current integrators, simultaneous sample-and-
holds, and two high speed, high resolution ADCs with configurable
sampling rate and resolutions of up to 24 bits. The signal chain
and sampling architecture of the ADAS1135 is designed to
guarantee that all channels are simultaneously sampled, and
that no charge is lost throughout the sampling process.
All converted channel results are output on a dual, low voltage
differential signaling (LVDS), self clocked serial interface,
which reduces external hardware.
An SPI-compatible serial interface allows configuration of the
ADC using the SDI_x input. The SDO_x output allows the
user to daisy-chain several ADCs on a single, 4-wire bus. The
ADAS1135 uses the separate supply, IOVDD, to reduce digital
noise effect on the conversions.
The ADAS1135 is in a 15 mm × 15 mm, CSP_BGA package.
AN0
AN127
AN128
AN255
KGND
For more information on the ADAS1135, contact Analog
Devices, Inc., at: adas@analog.com.
FUNCTIONAL BLOCK DIAGRAM
1.8V 2.5V 3.3V
TO NEXT SDI
SDO_x
TO ALL ADCs
VDD1 VDD2 VDD3
F
SCK
S/H
CONFIGURATION
REF
CS_x
RESET
F
S/H
F
S/H
+–ADCL
DATA
PROCESSING
SDI
LVDS/CMOS
INTERFACE
TEMPERATURE
DOUTx_x
CLKx
SYNC
IOVDD
2.5V
FPGA
F
S/H
+
–ADCH
ADAS1135
SDI
GND
VIO
FROM DOUT
OF OTHER ADCs
VT_x
REF 2.048V SDI_x
FROM
PREVIOUS SDO
Figure 1.
Rev. SpC
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However,
no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or
other rights of third parties that may result from its use. Specifications subject to change without
notice. No license is granted by implication or otherwise under any patent or patent rights of
Analog Devices. Trademarks and registered trademarks are the property of their respective
owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2015–2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com



Analog Devices ADAS1135
ADAS1135
NOTES
Data Sheet
©2015–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13810F-0-8/17(SpC)
Rev. SpC | Page 2 of 2







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