operational amplifiers. NJM324C Datasheet

NJM324C amplifiers. Datasheet pdf. Equivalent

NJM324C Datasheet
Recommendation NJM324C Datasheet
Part NJM324C
Description Low power quad operational amplifiers
Feature NJM324C; NJM324C Low power quad operational amplifiers Features • Wide gain bandwidth:1.3MHz typ. • Input co.
Manufacture New Japan Radio
Datasheet
Download NJM324C Datasheet




New Japan Radio NJM324C
NJM324C
Low power quad operational amplifiers
Features
• Wide gain bandwidth:1.3MHz typ.
• Input common-mode voltage range includes ground
• Large voltage gain:100dB typ.
• Very low supply current per amplifier:300uA typ.
• Low input bias current: 20nA typ.
• Low input offset voltage: 7mV max.
• Low input offset current: 2nA typ.
• Wide power supply range:
- Single supply: +3V to +30V
- Dual supplies: ±1.5V to ±15V
• Internal ESD protection
Human body model (HBM) ±2000V typ.
Description
The NJM324C consist of four independent, high gain, internally
frequency-compensated operational amplifiers. They operate from a single
power supply over a wide range of voltages. Operation from split power
supplies is also possible and the low power supply current drain is independent
of the magnitude of the power supply voltage.
1. Pin and schematic diagram
Figure 1. Pin connections (top view)
NJM324CG
( SOP14 )
NJM324CV
(SSOP14)
Output 1 1
Inverting Input 1 2
Non-inverting Input 1 3
VCC+ 4
Non-inverting Input 2 5
Inverting Input 2 6
Output 2 7
1
2
14 Output 4
4
13 Inverting Input 4
12 Non-inverting Input 4
11 VCC-
10 Non-inverting Input 3
9 Inverting Input 3
3
8 Output 3
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New Japan Radio NJM324C
NJM324C
Figure 2. Schematic diagram (1/4 NJM324C)
Invienrtvinegrting
InputInput
Nonno-nIn-vinevrteinrgting
Input Input
Vcc+
VCC
Q2
Q1
Q8
6μA
Q3
Q4
Q9
4μA
CC
100μA
Q5
Q6
Q7
Q11
Q10
Q12
RSC OOuutptpuutt
Q13
50μA
GVNcDc-
2 Absolute maximum ratings
Table1. Absolute maximum ratings
Symbol
Parameter
VCC Supply voltage (VCC+ - VCC-)
VIN Input voltage (1)
Vo Output Terminal Input Voltage
Value
32
Vcc- -0.3 to Vcc- +32
Vcc- -0.3 to Vcc+ +0.3
(Tamb=25°C)
Unit
V
V
V
VID Differential input voltage
IIN
Input current (2):Vin driven negative
Input current (3):Vin driven positive above AMR value
±32
5mA in DC or 50mA in AC (duty cycle = 10%, T=1s)
0.4
V
mA
Tstg Storage temperature range
-65 to +150
°C
Tj Maximum junction temperature
150 °C
PD Power Dissipation
SOP14
SSOP14
: 880(5) 1200(6)
: 510(5) 640(6)
mW
θja Thermal resistance junction to ambient(4)
SOP14
SSOP14
: 140(5)
: 245(5)
100(6)
195(6)
°C /W
ψjt Thermal resistance junction to top surface of IC package(4)
SOP14
SSOP14
: 40(5 )
: 49(5 )
35(6)
47(6)
°C /W
1. Input voltage is the voltage should be allowed to apply to the input terminal independent of the magnitude of VCC+
2. This input current only exists when the voltage at any of the input leads is driven negative. It is due to the collector-vase junction of the input PNP transistor
becoming forward-biased and thereby acting as input diode clamp. In addition to this diode action, there is NPN parasitic action on the IC chip.
This transistor action can cause the output voltages of the Op-amps to go to the VCC voltage level (or to ground for a large overdrive) for the time during
which an input is driven negative.
3. The junction base/substrate of the input PNP transistor polarized in reverse must be protected by a resistor in series with the inputs to limit the input current
to 400uA max (R= (Vin-32V)/400uA).
4. Short-circuit can cause excessive heating and destructive dissipation. Values are typical.
5. EIA/JEDEC STANDARD Test board (76.2 x 114.3 x 1.6mm, 2layers, FR-4) mounting
6. EIA/JEDEC STANDARD Test board (76.2 x 114.3 x 1.6mm, 4layers, FR-4) mounting
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New Japan Radio NJM324C
NJM324C
3. Operating conditions
Table2. Operating conditions
Symbol
Parameter
VCC Supply voltage (VCC+ - VCC-)
Toper Operating free-air temperature range
Value
3 to 30
-40 to +85
(Tamb=25°C)
Unit
V
°C
4. Electrical characteristics
Table3. VCC+ = +5V, VCC- = 0V, Tamb = +25˚C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Unit
Input offset voltage (1)
Vio Tamb = 25
0< Tamb < 70(5)
- 0.5 7 mV
- -9
Input offset current
Iio Tamb = 25
0< Tamb < 70(5)
Input bias current (2)
- 2 30 nA
- - 100
Iib Tamb = 25
0< Tamb < 70(5)
Large signal voltage gain (VCC+ = +15V, RL=2kΩ, Vo=1.4V to 11.4V)
Avd Tamb = 25
0< Tamb < 70(5)
Supply voltage rejection ratio (Rs<10kΩ,VCC+ = 5V to 30V)
-
-
50
25
20 150 nA
- 300
100 - V/mV
--
SVR
Tamb = 25
0< Tamb < 70(5)
65 110
65 -
-
-
dB
Supply current, all amp, no load
Tamb = 25
VCC+ = 5V
ICC VCC+ = 30V
0< Tamb < 70(5)
VCC+ = 5V
VCC+ = 30V
Input common mode voltage range (3) (VCC+ = +30V)
Vicm Tamb = 25
0< Tamb < 70(5)
- 1.2 2
- 1.7 3 mA
- -2
- -3
0
-
VCC+ - 1.5
V
0 - VCC+ - 2
Common mode rejection ratio (RS < 10kΩ)
CMR
Tamb = 25
0< Tamb < 70(5)
70 100
60 -
-
-
dB
Isource
Output current source
VCC+ = 15V, VO = +2V, Vid = +1V
mA
20 40
-
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