Digital Isolators. ADuM130D Datasheet

ADuM130D Isolators. Datasheet pdf. Equivalent

ADuM130D Datasheet
Recommendation ADuM130D Datasheet
Part ADuM130D
Description 3.0 kV RMS/3.75 kV RMS Triple-Channel Digital Isolators
Feature ADuM130D; Data Sheet 3.0 kV RMS/3.75 kV RMS Triple-Channel Digital Isolators ADuM130D/ADuM130E/ADuM131D/ADuM1.
Manufacture Analog Devices
Datasheet
Download ADuM130D Datasheet




Analog Devices ADuM130D
Data Sheet
3.0 kV RMS/3.75 kV RMS Triple-Channel
Digital Isolators
ADuM130D/ADuM130E/ADuM131D/ADuM131E
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
High common-mode transient immunity: 100 kV/μs
High robustness to radiated and conducted noise
Low propagation delay: 13 ns maximum for 5 V operation,
15 ns maximum for 1.8 V operation
150 Mbps maximum guaranteed data rate
Safety and regulatory approvals (pending)
UL recognition
3000 V rms/3750 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 849 V peak
CQC certification per GB4943.1-2011
Backward compatibility
ADuM130E1/ADuM131E1 pin-compatible with
ADuM1300/ADuM1301
Low dynamic power consumption
1.8 V to 5 V level translation
High temperature operation: 125°C
Fail-safe high or low options
16-lead, RoHS compliant, SOIC package
APPLICATIONS
General-purpose multichannel isolation
Serial peripheral interface (SPI)/data converter isolation
Industrial field bus isolation
GENERAL DESCRIPTION
The ADuM130D/ADuM130E/ADuM131D/ADuM131E1 are
triple-channel digital isolators based on Analog Devices, Inc.,
iCoupler® technology. Combining high speed, complementary
metal-oxide semiconductor (CMOS) and monolithic air core
transformer technology, these isolation components provide
outstanding performance characteristics superior to alternatives
such as optocoupler devices and other integrated couplers. The
maximum propagation delay is 13 ns with a pulse width distortion
of less than 3 ns at 5 V operation. Channel matching is tight at
3.0 ns maximum.
The ADuM130D/ADuM130E/ADuM131D/ADuM131E data
channels are independent and are available in a variety of config-
urations with a withstand voltage rating of 3.0 kV rms or
3.75 kV rms (see the Ordering Guide). The devices operate with
the supply voltage on either side ranging from 1.8 V to 5 V, prov-
iding compatibility with lower voltage systems as well as enabling
voltage translation functionality across the isolation barrier.
VDD1 1
GND1 2
VIA 3
VIB 4
VIC 5
NIC 6
DISABLE1 7
GND1 8
ADuM130D
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16 VDD2
15 GND2
14 VOA
13 VOB
12 VOC
11 NIC
10 NIC
9 GND2
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 1. ADuM130D Functional Block Diagram
VDD1 1
GND1 2
VIA 3
VIB 4
VIC 5
NIC 6
NIC 7
GND1 8
ADuM130E
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16 VDD2
15 GND2
14 VOA
13 VOB
12 VOC
11 NIC
10 VE2
9 GND2
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 2. ADuM130E Functional Block Diagram
VDD1 1
GND1 2
VIA 3
VIB 4
VOC 5
NIC 6
DISABLE1 7
GND1 8
ADuM131D
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16 VDD2
15 GND2
14 VOA
13 VOB
12 VIC
11 NIC
10 DISABLE2
9 GND2
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 3. ADuM131D Functional Block Diagram
VDD1 1
GND1 2
VIA 3
VIB 4
VOC 5
NIC 6
ADuM131E
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16 VDD2
15 GND2
14 VOA
13 VOB
12 VIC
11 NIC
VE1 7
GND1 8
10 VE2
9 GND2
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 4. ADuM131E Functional Block Diagram
Unlike other optocoupler alternatives, dc correctness is ensured
in the absence of input logic transitions. Two different fail-safe
options are available, in which the outputs transition to a pre-
determined state when the input power supply is not applied or
the inputs are disabled. The ADuM130E1/ADuM131E1 are pin-
compatible with the ADuM1300/ADuM1301.
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. A
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Technical Support
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Analog Devices ADuM130D
ADuM130D/ADuM130E/ADuM131D/ADuM131E
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
General Description ......................................................................... 1 
Functional Block Diagrams............................................................. 1 
Revision History ............................................................................... 2 
Specifications..................................................................................... 3 
Electrical Characteristics—5 V Operation................................ 3 
Electrical Characteristics—3.3 V Operation ............................ 4 
Electrical Characteristics—2.5 V Operation ............................ 6 
Electrical Characteristics—1.8 V Operation ............................ 7 
Insulation and Safety Related Specifications ............................ 9 
Package Characteristics ............................................................... 9 
Regulatory Information............................................................. 10 
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics ............................................................................ 11 
REVISION HISTORY
11/15—Rev. 0 to Rev. A
Added 16-Lead, Narrow Body SOIC Package ................Universal
Changes to Title, Features Section, and General Description
Section................................................................................................ 1
Added Table 9; Renumbered Sequentially .................................... 9
Changes to Table 10 and Table 11 .................................................. 9
Added Table 12 ............................................................................... 10
Changes to Table 13........................................................................ 10
Changes to Table 15 Title............................................................... 12
Added Figure 5; Renumbered Sequentially ................................ 12
Changes to Table 17 and Table 19 ................................................ 13
Added Table 18 ............................................................................... 13
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 22
7/15—Revision 0: Initial Version
Recommended Operating Conditions .................................... 12 
Absolute Maximum Ratings ......................................................... 13 
ESD Caution................................................................................ 13 
Truth Tables................................................................................. 14 
Pin Configurations and Function Descriptions ......................... 15 
Typical Performance Characteristics ........................................... 17 
Applications Information .............................................................. 18 
Overview ..................................................................................... 18 
Printed Circuit Board (PCB) Layout ....................................... 18 
Propagation Delay Related Parameters ................................... 19 
Jitter Measurement..................................................................... 19 
Insulation Lifetime ..................................................................... 19 
Outline Dimensions ....................................................................... 21 
Ordering Guide .......................................................................... 22 
Rev. A | Page 2 of 22



Analog Devices ADuM130D
Data Sheet
ADuM130D/ADuM130E/ADuM131D/ADuM131E
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 1.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate1
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Symbol Min
PW
tPHL, tPLH
PWD
6.6
150
4.8
tPSK
Typ
7.2
0.5
1.5
Channel Matching
Codirectional
Opposing Direction
Jitter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
tPSKCD
tPSKOD
VIH
VIL
VOH
Logic Low
VOL
Input Current per Channel
VE2 Enable Input Pull-Up Current
DISABLE1 Input Pull-Down Current
Tristate Output Current per Channel
Quiescent Supply Current
ADuM130D/ADuM130E
ADuM131D/ADuM131E
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive VDDx Threshold
Negative VDDx Threshold
VDDx Hysteresis
II
IPU
IPD
IOZ
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDDI (D)
IDDO (D)
UVLO
VDDxUV+
VDDxUV−
VDDxUVH
0.5
0.5
630
80
0.7 × VDDx
VDDx − 0.1
VDDx − 0.4
−10
−10
−10
VDDx
VDDx
0.2
0.0
0.2
+0.01
−3
9
+0.01
1.35
1.73
9.7
1.87
1.62
1.61
7.4
5.34
0.01
0.02
1.6
1.5
0.1
Max Unit
Test Conditions/Comments
ns Within pulse width distortion (PWD) limit
Mbps
Within PWD limit
13 ns
50% input to 50% output
3 ns |tPLH − tPHL|
ps/°C
6.1 ns
Between any two devices at the same
temperature, voltage, and load
3.0 ns
3.0 ns
ps p-p
See the Jitter Measurement section
ps rms
See the Jitter Measurement section
V
0.3 × VDDx V
V
V
0.1 V
0.4 V
+10 µA
µA
15 µA
+10 µA
IOx2 = −20 µA, VIx = VIxH3
IOx2 = −4 mA, VIx = VIxH3
IOx2 = 20 µA, VIx = VIxL4
IOx2 = 4 mA, VIx = VIxL4
0 V ≤ VIx ≤ VDDx
VE2 = 0 V
DISABLE1 = VDDx
0 V ≤ VOx ≤ VDDx
2.6 mA
2.9 mA
15.2 mA
3.0 mA
VI5 = 0 (E0, D0), 1 (E1, D1)6
VI5 = 0 (E0, D0), 1 (E1, D1)6
VI5 = 1 (E0, D0), 0 (E1, D1)6
VI5 = 1 (E0, D0), 0 (E1, D1)6
2.7 mA
2.8 mA
11.4 mA
7.2 mA
VI5 = 0 (E0, D0), 1 (E1, D1)6
VI5 = 0 (E0, D0), 1 (E1, D1)6
VI5 = 1 (E0, D0), 0 (E1, D1)6
VI5 = 1 (E0, D0), 0 (E1, D1)6
mA/Mbps Inputs switching, 50% duty cycle
mA/Mbps Inputs switching, 50% duty cycle
V
V
V
Rev. A | Page 3 of 22







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