Front Ends. ADPD107 Datasheet

ADPD107 Ends. Datasheet pdf. Equivalent

ADPD107 Datasheet
Recommendation ADPD107 Datasheet
Part ADPD107
Description Photometric Front Ends
Feature ADPD107; Data Sheet FEATURES Multifunction photometric front end Fully integrated AFE, ADC, LED drivers, and .
Manufacture Analog Devices
Datasheet
Download ADPD107 Datasheet




Analog Devices ADPD107
Data Sheet
FEATURES
Multifunction photometric front end
Fully integrated AFE, ADC, LED drivers, and timing core
Enables best-in-class ambient light rejection capability
without the need for photodiode optical filters
Three 370 mA LED drivers
Flexible, multiple, short LED pulses per optical sample
20-bit burst accumulator enabling 20 bits per sample period
On-board sample to sample accumulator, enabling up to
27 bits per data read
Low power operation
SPI, I2C interface, and 1.8 V analog/digital core
Flexible sampling frequency ranging from 0.122 Hz to 3820 Hz
FIFO data operation
APPLICATIONS
Wearable health and fitness monitors
Clinical measurements, for example, SpO2
Industrial monitoring
Background light measurements
Photometric Front Ends
ADPD105/ADPD106/ADPD107
GENERAL DESCRIPTION
The ADPD105/ADPD106/ADPD107 are highly efficient,
photometric front ends, each with an integrated 14-bit analog-
to-digital converter (ADC) and a 20-bit burst accumulator that
works with flexible light emitting diode (LED) drivers. The
accumulator is designed to stimulate an LED and measure
the corresponding optical return signal. The data output and
functional configuration occur over a 1.8 V I2C interface on the
ADPD105 or SPI on the ADPD106 and ADPD107. The control
circuitry includes flexible LED signaling and synchronous
detection.
The analog front end (AFE) features best-in-class rejection of signal
offset and corruption due to modulated interference commonly
caused by ambient light.
Couple the ADPD105/ADPD106/ADPD107 with a low
capacitance photodiode of <100 pF for optimal performance.
The ADPD105/ADPD106/ADPD107 can be used with any LED.
The ADPD105 is available in a 2.46 mm × 1.4 mm WLCSP and a
4 mm × 4 mm LFCSP. The SPI only versions, ADPD106 and
ADPD107, are available in a 2.46 mm × 1.4 mm WLCSP.
Rev. A
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Analog Devices ADPD107
ADPD105/ADPD106/ADPD107
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
General Description ......................................................................... 1 
Revision History ............................................................................... 3 
Functional Block Diagrams............................................................. 4 
Specifications..................................................................................... 6 
Temperature and Power Specifications ..................................... 6 
Performance Specifications......................................................... 7 
Analog Specifications................................................................... 8 
Digital Specifications ................................................................... 9 
Timing Specifications ................................................................ 10 
Absolute Maximum Ratings.......................................................... 12 
Thermal Resistance .................................................................... 12 
Recommended Soldering Profile ............................................. 12 
ESD Caution................................................................................ 12 
Pin Configurations and Function Descriptions ......................... 13 
Typical Performance Characteristics ........................................... 17 
Theory of Operation ...................................................................... 19 
Introduction ................................................................................ 19 
Dual Time Slot Operation......................................................... 19 
Time Slot Switch ......................................................................... 20 
Adjustable Sampling Frequency ............................................... 22 
State Machine Operation........................................................... 23 
Normal Mode Operation and Data Flow ................................ 23 
AFE Operation............................................................................ 25 
AFE Integration Offset Adjustment......................................... 25 
I2C Serial Interface...................................................................... 27 
SPI Port ........................................................................................ 28 
Typical Connection Diagram ................................................... 30 
Data Sheet
LED Driver Pins and LED Supply Voltage.............................. 31 
LED Driver Operation............................................................... 31 
Determining the Average Current ........................................... 31 
Determining CVLED ..................................................................... 32 
LED Inductance Considerations .............................................. 32 
Recommended Start-Up Sequence .......................................... 33 
Reading Data............................................................................... 33 
Clocks and Timing Calibration ................................................ 34 
Optional Timing Signals Available on GPIO0 and GPIO1 .. 35 
Calculating Current Consumption .......................................... 37 
Optimizing SNR per Watt ......................................................... 38 
Optimizing Power by Disabling Unused Channels and
Amplifiers.................................................................................... 39 
TIA ADC Mode.......................................................................... 40 
Digital Integrate Mode............................................................... 42 
Pulse Connect Mode.................................................................. 45 
Synchronous ECG and PPG Measurement Using TIA ADC
Mode ............................................................................................ 45 
Register Listing ............................................................................... 48 
LED Control Registers............................................................... 52 
AFE Global Configuration Registers....................................... 54 
System Registers ......................................................................... 59 
ADC Registers ............................................................................ 63 
Data Registers ............................................................................. 64 
Required Start-Up Load Procedure ......................................... 64 
Outline Dimensions ....................................................................... 65 
Ordering Guide .......................................................................... 66 
Rev. A | Page 2 of 66



Analog Devices ADPD107
Data Sheet
REVISION HISTORY
1/2017—Rev. 0 to Rev. A
Added ADPD106................................................................. Universal
Changes to Features Section and General Description Section .......1
Changes to Figure 1...........................................................................4
Added Figure 2; Renumbered Sequentially ...................................5
Changes to Table 2 ............................................................................6
Changes to Table 9 ..........................................................................12
Added Figure 6 and Table 11; Renumbered Sequentially..........13
Added Figure 8 and Table 13 .........................................................15
Changes to ADPD105 LFCSP Input Configurations
Section ..............................................................................................20
Added Register 0x14, PD1 to PD8 Input Configurations Section
and Figure 19 to Figure 21 .............................................................20
ADPD105/ADPD106/ADPD107
Added Table 16 and WLCSP Input Configurations Section .....21
Changes to Register 0x14, PD1 to PD4 Input Configurations
Section ..............................................................................................21
Changes to Typical Connection Diagram Section .....................30
Added Figure 37 and Table 22.......................................................31
Added Measuring Voltages Using the Current Input Section,
Figure 52, and Figure 53.................................................................47
Changes to Table 28 ........................................................................48
Updated Outline Dimensions........................................................65
Changes to Ordering Guide...........................................................66
7/2016—Revision 0: Initial Version
Rev. A | Page 3 of 66





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