Analog-to-Digital Converter. ADAU1979 Datasheet

ADAU1979 Converter. Datasheet pdf. Equivalent

ADAU1979 Datasheet
Recommendation ADAU1979 Datasheet
Part ADAU1979
Description Quad Analog-to-Digital Converter
Feature ADAU1979; Data Sheet Quad Analog-to-Digital Converter (ADC) ADAU1979 FEATURES Four 4.5 V rms (typical) diffe.
Manufacture Analog Devices
Datasheet
Download ADAU1979 Datasheet




Analog Devices ADAU1979
Data Sheet
Quad Analog-to-Digital Converter (ADC)
ADAU1979
FEATURES
Four 4.5 V rms (typical) differential inputs
On-chip phase-locked loop (PLL) for master clock
Low electromagnetic interference (EMI) design
109 dB (typical) analog-to-digital converter (ADC) dynamic
range
Total harmonic distortion + noise (THD + N): −95 dB (typical)
Selectable digital high-pass filter
24-bit stereo ADC with 8 kHz to 192 kHz sample rates
Digital volume control with autoramp function
I2C/SPI controllable for flexibility
Software-controllable clickless mute
Software power-down
Right justified, left justified, I2S, and TDM modes
Master and slave operation modes
40-lead LFCSP package
Qualified for automotive applications
APPLICATIONS
Automotive audio systems
Active noise cancellation systems
GENERAL DESCRIPTION
The ADAU1979 incorporates four high performance, analog-to-
digital converters (ADCs) with 4.5 V rms capable ac-coupled
inputs. The ADCs use a multibit sigma-delta (Σ-Δ) architecture
with continuous time front end for low EMI. An I2C/serial
peripheral interface (SPI) control port is included that allows a
microcontroller to adjust volume and many other parameters.
The ADAU1979 uses only a single 3.3 V supply. The device
internally generates the required digital DVDD supply. The low
power architecture reduces the power consumption. The on-
chip PLL can derive the master clock from an external clock
input or frame clock (sample rate clock). When fed with the
frame clock, it eliminates the need for a separate high frequency
master clock in the system. The ADAU1979 is available in a
40-lead LFCSP package.
Note that throughout this data sheet, multifunction pins, such
as SCL/CCLK, are referred to either by the entire pin name or
by a single function of the pin, for example, CCLK, when only
that function is relevant.
FUNCTIONAL BLOCK DIAGRAM
AIN1
AIN1
AIN2
AIN2
AIN3
AIN3
AIN4
AIN4
ADAU1979
AVDDx
ADC
ADC
ADC
ADC
3.3V TO 1.8V
REGULATOR
BG
REF
AGNDx
AVDDx
PLL
AGNDx
AGNDx
I2C/SPI
CONTROL
DVDD
IOVDD
LRCLK
BCLK
SDATAOUT1
SDATAOUT2
SCL/CCLK
SDA/COUT
ADDR1/CIN
ADDR0/CLATCH
PD/RST
Figure 1.
Rev. 0
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Analog Devices ADAU1979
ADAU1979* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
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DOCUMENTATION
Data Sheet
ADAU1979: Quad Analog-to-Digital Converter (ADC) Data
Sheet
User Guides
UG-600: Evaluating the ADAU1977/ADAU1978/
ADAU1979
SOFTWARE AND SYSTEMS REQUIREMENTS
ADAU1977 Sound CODEC Linux Driver
DESIGN RESOURCES
ADAU1979 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
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SAMPLE AND BUY
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number.
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Analog Devices ADAU1979
ADAU1979
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Analog Performance Specifications ........................................... 3
Digital Input/Output Specifications........................................... 3
Power Supply Specifications........................................................ 4
Digital Filter Specifications ......................................................... 4
Timing Specifications .................................................................. 5
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 12
Overview...................................................................................... 12
Power Supply and Voltage Reference....................................... 12
Power-On Reset Sequence ........................................................ 12
PLL and Clock............................................................................. 13
Analog Inputs.............................................................................. 14
ADC ............................................................................................. 16
ADC Summing Modes .............................................................. 16
Serial Audio Data Output Ports, Data Format ....................... 17
Control Ports ................................................................................... 21
I2C Mode...................................................................................... 21
REVISION HISTORY
11/13—Revision 0: Initial Version
Data Sheet
SPI Mode ..................................................................................... 24
Register Summary .......................................................................... 26
Register Details ............................................................................... 27
Master Power and Soft Reset Register ..................................... 27
PLL Control Register ................................................................. 28
Block Power Control and Serial Port Control Register......... 29
Serial Port Control Register 1................................................... 30
Serial Port Control Register 2................................................... 31
Channel 1 and Channel 2 Mapping for Output Serial Ports
Register ........................................................................................ 32
Channel 3 and Channel 4 Mapping for Output Serial Ports
Register ........................................................................................ 34
Serial Output Drive Control and Overtemperature Protection
Status Register............................................................................. 35
Post ADC Gain Channel 1 Control Register .......................... 36
Post ADC Gain Channel 2 Control Register .......................... 37
Post ADC Gain Channel 3 Control Register .......................... 37
Post ADC Gain Channel 4 Control Register .......................... 38
High-Pass Filter and DC Offset Control Register and Master
Mute Register .............................................................................. 38
ADC Clipping Status Register .................................................. 39
Digital DC High-Pass Filter and Calibration Register .......... 40
Typical Application Circuit ........................................................... 41
Outline Dimensions ....................................................................... 42
Ordering Guide .......................................................................... 42
Automotive Products ................................................................. 42
Rev. 0 | Page 2 of 44







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