Signal Processor. ADDI7015 Datasheet
Quad-Channel, 16-Bit CCD Signal
Processor with Precision Timing Core
4 independent AFE channels
1.8 V analog and digital core supply voltage
Complete on-chip ISATG timing generator with 16 XV
outputs and 4 general-purpose outputs (GPO)
Differential analog inputs
CDS or SHA (CDS bypass) with 7 gain settings
0 dB to 36 dB, 10-bit variable gain amplifier (VGA)
16-bit, 65 MSPS analog-to-digital converter (ADC)
Precision Timing core with 240 ps resolution at 65 MHz
8 programmable H-clock outputs
On-chip sync generator with external sync input
8 mm × 8 mm CSP_BGA package with 0.65 pitch
The ADDI7015 is a highly integrated, quad-channel, CCD
signal processor for high speed digital imaging applications.
Each channel is specified at pixel rates of up to 65 MHz and
consists of a complete analog front end (AFE) with analog-to-
digital conversion. The Precision Timing® core allows adjust-
ment of the correlated double sampler (CDS) and sample-and-
hold amplifier (SHA) clocks with 240 ps resolution at 65 MHz
operation. There are eight independent horizontal clock outputs
to support a variety of CCD timing requirements. The
ADDI7015 also features a programmable ISATG for vertical
Each analog front end includes black level clamping, a CDS, a
VGA, and a 65 MSPS, 16-bit analog-to-digital converter (ADC).
Operation is programmed using a 4-wire serial interface.
Packaged in a space-saving, 8 mm × 8 mm, CSP_BGA, the
ADDI7015 is specified over an operating temperature range of
−25°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
0dB TO 18dB
0dB TO 36dB
H1 TO H8
XV1 TO XV16
GPO1 TO GPO4
HD VD SYNC
1. THE CIRCUITRY FOR AFE_A TO AFE_D IS IDENTICAL.
SL1 SL2 SDATA SCK
For more information on the ADDI7015, email Analog Devices, Inc., at afe.ccd@analog.
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