Audio Amplifier. SSM2319 Datasheet

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SSM2319 Datasheet
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Part SSM2319
Description Mono 3 W Class-D Audio Amplifier
Feature SSM2319; Filterless, High Efficiency, Mono 3 W Class-D Audio Amplifier SSM2319 FEATURES Filterless Class-D a.
Manufacture Analog Devices
Datasheet
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Analog Devices SSM2319
Filterless, High Efficiency,
Mono 3 W Class-D Audio Amplifier
SSM2319
FEATURES
Filterless Class-D amplifier with ultraefficient spread-
spectrum Σ-Δ modulation
Internal modulator synchronization (SYNC)
3 W into 3 Ω load and 1.4 W into 8 Ω load at 5.0 V supply
with <1% total harmonic distortion (THD)
90% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Signal-to-noise ratio (SNR): 98 dB
Single-supply operation: 2.5 V to 5.5 V
Ultralow shutdown current: 20 nA
Short-circuit and thermal protection with autorecovery
Available in 9-ball, 1.5 mm × 1.5 mm WLCSP
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 12 dB or user-adjustable gain setting
The SSM2319 features a high efficiency, low noise modulation
scheme that does not require any external LC output filters. The
modulation continues to provide high efficiency even at low output
power. It operates with 90% efficiency at 1.4 W into 8 Ω or 85%
efficiency at 3 W into 3 Ω from a 5.0 V supply and has an SNR
of 98 dB. Spread-spectrum pulse density modulation is used to
provide lower EMI-radiated emissions compared with other
Class-D architectures.
SYNC can be activated in the event that end users are concerned
about clock intermodulation (beating effect) of several amplifiers in
close proximity.
The SSM2319 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying a
logic low to the SD pin.
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
The device also includes pop-and-click suppression circuitry.
This minimizes voltage glitches at the output during turn-on and
turn-off, reducing audible noise on activation and deactivation.
The default gain of the SSM2319 is 12 dB, but users can reduce
the gain by using a pair of external resistors (see the Gain section).
GENERAL DESCRIPTION
The SSM2319 is a fully integrated, high efficiency Class-D
audio amplifier. It is designed to maximize performance for
mobile phone applications. The application circuit requires a
minimum of external components and operates from a single
2.5 V to 5.5 V supply. It is capable of delivering 3 W of continuous
output power with <1% THD + N driving a 3 Ω load from a
5.0 V supply.
The SSM2319 is specified over the industrial temperature range
of −40°C to +85°C. It has built-in thermal shutdown and output
short-circuit protection. It is available in a 9-ball, 1.5 mm × 1.5 mm
wafer level chip scale package (WLCSP).
FUNCTIONAL BLOCK DIAGRAM
10µF
0.1µF
VBATT
2.5V TO 5.5V
AUDIO IN–
AUDIO IN+
0.1µF*
0.1µF*
SHUTDOWN
SSM2319
IN– 40k
IN+ 40k
160k
VDD
MODULATOR
FET
(Σ-Δ)
DRIVER
OUT+
OUT–
160k
POP/CLICK
SUPPRESSION
SD
BIAS
INTERNAL
OSCILLATOR
SYNC
SYNCO
GND SYNCI
SYNC OUTPUT
SYNC INPUT
*INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY VDD/2.
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.



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DOCUMENTATION
Data Sheet
SSM2319: Filterless, High Efficiency, Mono 3 W Class-D
Audio Amplifier Data Sheet
DESIGN RESOURCES
ssm2319 Material Declaration
PCN-PDN Information
Quality And Reliability
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Analog Devices SSM2319
SSM2319
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Typical Application Circuits.......................................................... 12
REVISION HISTORY
8/08—Revision 0: Initial Version
Theory of Operation ...................................................................... 14
Overview ..................................................................................... 14
Gain.............................................................................................. 14
Pop-and-Click Suppression ...................................................... 14
Output Modulation Description .............................................. 14
Layout .......................................................................................... 15
Input Capacitor Selection.......................................................... 15
Power Supply Decoupling ......................................................... 15
Syncronization (SYNC) Operation.......................................... 15
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
Rev. 0 | Page 2 of 20







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