Programmable System-on-Chip. CY8C56LP Datasheet

CY8C56LP System-on-Chip. Datasheet pdf. Equivalent

CY8C56LP Datasheet
Recommendation CY8C56LP Datasheet
Part CY8C56LP
Description Programmable System-on-Chip
Feature CY8C56LP; PSoC® 5LP: CY8C56LP Family Datasheet Programmable System-on-Chip (PSoC®) General Description PSoC®.
Manufacture Cypress Semiconductor
Datasheet
Download CY8C56LP Datasheet




Cypress Semiconductor CY8C56LP
PSoC® 5LP: CY8C56LP Family
Datasheet
Programmable System-on-Chip (PSoC®)
General Description
PSoC® 5LP is a true programmable embedded system-on-chip, integrating configurable analog and digital peripherals, memory, and
a microcontroller on a single chip. The PSoC 5LP architecture boosts performance through:
32-bit Arm® Cortex®-M3 core plus DMA controller and digital filter processor, at up to 80 MHz
Ultra low power with industry's widest voltage range
Programmable digital and analog peripherals enable custom functions
Flexible routing of any analog or digital peripheral function to any pin
PSoC devices employ a highly configurable system-on-chip architecture for embedded control design. They integrate configurable
analog and digital circuits, controlled by an on-chip microcontroller. A single PSoC device can integrate as many as 100 digital and
analog peripheral functions, reducing design time, board space, power consumption, and system cost while improving system quality.
Features
Operating characteristics
Voltage range: 1.71 to 5.5 V, up to 6 power domains
Temperature range (ambient): –40 to 85
Extended temperature parts: –40 to 105
°C[1]
°C
DC to 80-MHz operation
Power modes
• Active mode 3.1 mA at 6 MHz, and 15.4 mA at 48 MHz
• 2-µA sleep mode
• 300-nA hibernate mode with RAM retention
Boost regulator from 0.5-V input up to 5-V output
Performance
32-bit Arm Cortex-M3 CPU, 32 interrupt inputs
24-channel direct memory access (DMA) controller
24-bit 64-tap fixed-point digital filter processor (DFB)
Memories
Up to 256 KB program flash, with cache and security features
Up to 32 KB additional flash for error correcting code (ECC)
Up to 64 KB RAM
2 KB EEPROM
Digital peripherals
Four 16-bit timer, counter, and PWM (TCPWM) blocks
I2C, 1 Mbps bus speed
USB
face
(2T.I0Dc#e1r0ti8fi4e0d0F3u2l)l-uSspienegdin(tFeSrn) a1l2oMscbilplastopre[2r]ipheral
inter-
Full CAN 2.0b, 16 Rx, 8 Tx buffers
20 to 24 universal digital blocks
create any number of functions:
(UDB),
programmable
to
• 8-, 16-, 24-, and 32-bit timers, counters, and PWMs
• I2C, UART, SPI, I2S, LIN 2.0 interfaces
• Cyclic redundancy check (CRC)
• Pseudo random sequence (PRS) generators
• Quadrature decoders
• Gate-level logic functions
Programmable clocking
3- to 74-MHz internal oscillator, 1% accuracy at 3 MHz
4- to 25-MHz external crystal oscillator
Internal PLL clock generation up to 80 MHz
Low-power internal oscillator at 1, 33, and 100 kHz
32.768-kHz external watch crystal oscillator
12 clock dividers routable to any peripheral or I/O
Analog peripherals
Configurable 8- to 12-bit delta-sigma ADC
Up to two 12-bit SAR ADCs
Four 8-bit DACs
Four comparators
Four opamps
Four programmable analog blocks, to create:
• Programmable gain amplifier (PGA)
• Transimpedance amplifier (TIA)
• Mixer
• Sample and hold circuit
CapSense® support, up to 62 sensors
1.024 V ±0.1% internal voltage reference
Versatile I/O system
48 to 72 I/O pins – up to 62 general-purpose I/Os (GPIOs)
Up to eight performance I/O (SIO) pins
• 25 mA current sink
• Programmable input threshold and output high voltages
• Can act as a general-purpose comparator
• Hot swap capability and overvoltage tolerance
Two USBIO pins that can be used as GPIOs
Route any digital or analog peripheral to any GPIO
LCD direct drive from any GPIO, up to 46 × 16 segments
CapSense support from any GPIO
1.2-V to 5.5-V interface voltages, up to four power domains
Programming, debug, and trace
JTAG (4-wire), serial wire debug (SWD) (2-wire), single wire
viewer (SWV), and Traceport (5-wire) interfaces
Arm debug and trace modules embedded in the CPU core
Bootloader programming through I2C, SPI, UART, USB, and
other interfaces
Package options: 68-pin QFN,100-pin TQFP, and 99-pin CSP
Development support with free PSoC Creator™ tool
Schematic and firmware design support
Over 100 PSoC Components™ integrate multiple ICs and
system interfaces into one PSoC. Components are free
embedded ICs represented by icons. Drag and drop
component icons to design systems in PSoC Creator.
Includes
compiler
free
GCC
compiler,
supports
Keil/Arm
MDK
Supports device programming and debugging
Notes
1. The maximum storage temperature is 150 °C in compliance with JEDEC Standard JESD22-A103, High Temperature Storage Life.
2. This feature on select devices only. See Ordering Information on page 119 for details.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-84935 Rev. *N
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 27, 2019



Cypress Semiconductor CY8C56LP
PSoC® 5LP: CY8C56LP Family
Datasheet
More Information
Cypress provides a wealth of data at www.cypress.com to help you to select the right PSoC device for your design, and to help you
to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the knowledge base article
KBA86521, How to Design with PSoC 3, PSoC 4, and PSoC 5LP. Following is an abbreviated list for PSoC 5LP:
Overview: PSoC Portfolio, PSoC Roadmap
Product Selectors: PSoC 1, PSoC 3, PSoC 4, PSoC 5LP
In addition, PSoC Creator includes a device selection tool.
Application notes: Cypress offers a large number of PSoC
application notes and code examples covering a broad range
of topics, from basic to advanced level. Recommended appli-
cation notes for getting started with PSoC 5LP are:
AN77759: Getting Started With PSoC 5LP
AN77835: PSoC 3 to PSoC 5LP Migration Guide
AN61290: Hardware Design Considerations
AN57821: Mixed Signal Circuit Board Layout
AN58304: Pin Selection for Analog Designs
AN81623: Digital Design Best Practices
AN73854: Introduction To Bootloaders
PSoC Creator
Development Kits:
CY8CKIT-059 is a low-cost platform for prototyping, with a
unique snap-away programmer and debugger on the USB
connector.
CY8CKIT-050 is designed for analog performance, for devel-
oping high-precision analog, low-power, and low-voltage ap-
plications.
CY8CKIT-001 provides a common development platform for
any one of the PSoC 1, PSoC 3, PSoC 4, or PSoC 5LP
families of devices.
The MiniProg3 device provides an interface for flash pro-
gramming and debug.
Technical Reference Manuals (TRM)
Architecture TRM
Registers TRM
Programming Specification
PSoC Creator is a free Windows-based Integrated Design Environment (IDE). It enables concurrent hardware and firmware design
of PSoC 3, PSoC 4, and PSoC 5LP based systems. Create designs using classic, familiar schematic capture supported by over 100
pre-verified, production-ready PSoC Components; see the list of component datasheets. With PSoC Creator, you can:
1. Drag and drop component icons to build your hardware
system design in the main design workspace
2. Codesign your application firmware with the PSoC hardware,
using the PSoC Creator IDE C compiler
3. Configure components using the configuration tools
4. Explore the library of 100+ components
5. Review component datasheets
Figure 1. Multiple-Sensor Example Project in PSoC Creator
1
2
34
5
Document Number: 001-84935 Rev. *N
Page 2 of 131



Cypress Semiconductor CY8C56LP
PSoC® 5LP: CY8C56LP Family
Datasheet
Contents
1. Architectural Overview ................................................ 4
2. Pinouts .......................................................................... 6
3. Pin Descriptions ......................................................... 11
4. CPU .............................................................................. 12
4.1 Arm Cortex-M3 CPU ................................................. 12
4.2 Cache Controller ....................................................... 14
4.3 DMA and PHUB ......................................................... 15
4.4 Interrupt Controller ................................................... 17
5. Memory ........................................................................ 19
5.1 Static RAM .......................................................... 19
5.2 Flash Program Memory ....................................... 19
5.3 Flash Security ...................................................... 19
5.4 EEPROM ............................................................. 19
5.5 Nonvolatile Latches (NVLs) ................................. 20
5.6 External Memory Interface .................................. 21
5.7 Memory Map ....................................................... 22
6. System Integration ..................................................... 23
6.1 Clocking System .................................................. 23
6.2 Power System ..................................................... 26
6.3 Reset ................................................................... 30
6.4 I/O System and Routing ...................................... 32
7. Digital Subsystem ...................................................... 38
7.1 Example Peripherals ........................................... 39
7.2 Universal Digital Block ......................................... 40
7.3 UDB Array Description ........................................ 44
7.4 DSI Routing Interface Description ....................... 44
7.5 CAN ..................................................................... 46
7.6 USB ..................................................................... 47
7.7 Timers, Counters, and PWMs ............................. 48
7.8 I2C ....................................................................... 48
7.9 Digital Filter Block ................................................ 50
8. Analog Subsystem ..................................................... 50
8.1 Analog Routing .................................................... 52
8.2 Delta-sigma ADC ................................................. 54
8.3 Successive Approximation ADCs ........................ 55
8.4 Comparators ........................................................ 55
8.5 Opamps ............................................................... 57
8.6 Programmable SC/CT Blocks ............................. 57
8.7 LCD Direct Drive ................................................. 58
8.8 CapSense ............................................................ 59
8.9 Temp Sensor ....................................................... 59
8.10 DAC ................................................................... 59
8.11 Up/Down Mixer .................................................. 60
8.12 Sample and Hold ............................................... 61
9. Programming, Debug Interfaces, Resources ........... 61
9.1 JTAG Interface .................................................... 62
9.2 SWD Interface ..................................................... 63
9.3 Debug Features ................................................... 64
9.4 Trace Features .................................................... 64
9.5 SWV and TRACEPORT Interfaces ..................... 64
9.6 Programming Features ........................................ 64
9.7 Device Security ................................................... 64
9.8 CSP Package Bootloader .................................... 65
10. Development Support .............................................. 65
10.1 Documentation .................................................. 65
10.2 Online ................................................................ 65
10.3 Tools .................................................................. 65
11. Electrical Specifications .......................................... 66
11.1 Absolute Maximum Ratings ............................... 66
11.2 Device Level Specifications ............................... 67
11.3 Power Regulators .............................................. 71
11.4 Inputs and Outputs ............................................ 75
11.5 Analog Peripherals ............................................ 83
11.6 Digital Peripherals ........................................... 104
11.7 Memory ........................................................... 108
11.8 PSoC System Resources ................................ 112
11.9 Clocking ........................................................... 115
12. Ordering Information .............................................. 119
12.1 Part Numbering Conventions .......................... 120
13. Packaging ................................................................ 121
14. Acronyms ................................................................ 124
15. Document Conventions ......................................... 126
15.1 Units of Measure ............................................. 126
Document History Page ............................................... 127
Sales, Solutions, and Legal Information .................... 131
Worldwide Sales and Design Support ..................... 131
Products .................................................................. 131
PSoC® Solutions .................................................... 131
Cypress Developer Community ............................... 131
Technical Support ................................................... 131
Document Number: 001-84935 Rev. *N
Page 3 of 131







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