Programmable System-on-Chip. CY8C22345H Datasheet

CY8C22345H System-on-Chip. Datasheet pdf. Equivalent

CY8C22345H Datasheet
Recommendation CY8C22345H Datasheet
Part CY8C22345H
Description Automotive Programmable System-on-Chip
Feature CY8C22345H; CY8C21345, CY8C21645 CY8C22345, CY8C22345H, CY8C22645 Automotive PSoC® Programmable System-on-Chip™ .
Manufacture Cypress Semiconductor
Datasheet
Download CY8C22345H Datasheet




Cypress Semiconductor CY8C22345H
CY8C21345/CY8C21645
CY8C22345/CY8C22345H/CY8C22645
Automotive PSoC®
Programmable System-on-Chip™
Automotive PSoC® Programmable System-on-Chip™
Features
Automotive Electronics Council (AEC) Q100 qualified
Powerful Harvard-architecture processor
M8C processor speeds up to 24 MHz
8 × 8 multiply, 32-bit accumulate
Low power at high speed
Automotive A-grade: 3.0 V to 5.25 V operation at –40 °C to
+85 °C temperature range
Automotive E-grade: 4.75 V to 5.25 V operation at –40 °C to
+125 °C temperature range
Advanced peripherals (PSoC® blocks)
Six analog Type ‘E’ PSoC blocks provide:
• Up to four comparators with digital-to-analog converters
(DAC) references
• Up to 10-bit single or dual analog-to-digital converters
(ADCs)
Up to eight digital PSoC blocks provide:
• 8 to 32-bit timers, counters, and pulse width modulators
(PWMs)
• One-shot, multi-shot mode in timers and PWMs
• PWM with deadband in one digital block
• Shift register, cyclical redundancy check (CRC), and
pseudo random sequence (PRS) modules
• Full- or half-duplex UARTs
• SPI masters or slaves, 8- to 16-bit variable data length
• Connectable to all general-purpose I/O (GPIO) pins
Complex peripherals by combining blocks
Powerful synchronization support, analog module operations
can be synchronized by digital blocks or external signals.
High-speed 10-bit successive approximation register (SAR)
ADC with sample and hold optimized for embedded control
CY8C22345H devices Integrate Immersion® TouchSense®
Haptics Technology for ERM drive control
Precision, programmable clocking
Internal oscillator up to 24 MHz
High accuracy 24 MHz with optional 32-kHz crystal and
phase locked loop (PLL)
Optional external oscillator, up to 24 MHz
Internal low speed, low-power oscillator for watchdog and
sleep functionality
Flexible on-chip memory
Up to 16 KB flash program storage, 1000 erase/write cycles
Up to 1 KB SRAM data storage
In-System Serial Programming (ISSP)
Partial flash updates
Flexible protection modes
EEPROM emulation in flash
Optimized CapSense® resource
Supports two CapSense channels with simultaneous
scanning
Two current DACs provide programmable sensor tuning in
firmware
Two dedicated clock resources for CapSense
Two dedicated 16-bit timers/counters for CapSense
scanning
Versatile analog mux
Common internal analog bus
Simultaneous connection of I/O combinations
Programmable pin configurations
25 mA sink, 10 mA drive on all GPIOs
Pull-up, pull-down, high Z, strong, or open-drain drive modes
on all GPIOs
Analog input on all GPIOs
Configurable interrupt on all GPIOs
Additional system resources:
I2C master, slave, or multi-master
• Operation up to 400 kHz
• Hardware address detection feature
Watchdog and sleep timers
User-configurable low voltage detection
Integrated supervisory circuit
On-chip precision voltage reference
Hardware real time clock (RTC) block
Block Diagram
PSoC CORE
Port 4 Port 3 Port 2 Port 1 Port 0
System Bus
Global Digital
Interconnect
SRAM
1KB/512B
Interrupt
Controller
Global Analog Interconnect
SROM Flash 16K/8K
CPU Core (M8C)
Sleep and
Watchdog
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
DIGITAL SYSTEM
Digital Block
Array
CapSense Digital
Resources
ANALOG SYSTEM
10-bit SAR
ADC
Analog
Block
Array
Analog
Ref
Analog
Input
Muxing
Digital
Clocks
Multiply
Accum.
I2C
RTC
POR and LVD
System Resets
SYSTEM RESOURCES
Internal
Voltage
Ref.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-55397 Rev. *O
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 5, 2018



Cypress Semiconductor CY8C22345H
CY8C21345/CY8C21645
CY8C22345/CY8C22345H/CY8C22645
Contents
PSoC Functional Overview .............................................. 3
PSoC Core .................................................................. 3
Digital System ............................................................. 3
Analog System ............................................................ 4
Haptics TS2000 Controller .......................................... 4
Additional System Resources ..................................... 5
PSoC Device Characteristics ...................................... 5
Getting Started .................................................................. 6
Application Notes ........................................................ 6
Development Kits ........................................................ 6
Training ....................................................................... 6
CYPros Consultants .................................................... 6
Solutions Library .......................................................... 6
Technical Support ....................................................... 6
Development Tools .......................................................... 6
PSoC Designer Software Subsystems ........................ 6
Designing with PSoC Designer ....................................... 7
Select User Modules ................................................... 7
Configure User Modules .............................................. 7
Organize and Connect ................................................ 7
Generate, Verify, and Debug ....................................... 7
Pinouts .............................................................................. 8
28-pin Part Pinout ........................................................ 8
48-pin Part Pinout ........................................................ 9
Registers ......................................................................... 10
Register Conventions ................................................ 10
Register Mapping Tables .......................................... 10
Absolute Maximum Ratings .......................................... 13
Operating Temperature .................................................. 13
Electrical Specifications ................................................ 14
DC Electrical Characteristics ..................................... 15
AC Electrical Characteristics ..................................... 21
Development Tool Selection ......................................... 29
Software .................................................................... 29
Development Kits ...................................................... 29
Evaluation Tools ........................................................ 29
Device Programmers ................................................. 30
Accessories (Emulation and Programming) .............. 30
Ordering Information ...................................................... 31
Ordering Code Definitions ......................................... 32
Packaging Information ................................................... 33
Package Dimensions ................................................. 33
Thermal Impedances ................................................. 34
Capacitance on Crystal Pins ..................................... 34
Solder Reflow Specifications ..................................... 34
Tape and Reel Information ........................................ 35
Tube Information ....................................................... 37
Acronyms ........................................................................ 39
Reference Documents .................................................... 39
Document Conventions ................................................. 40
Units of Measure ....................................................... 40
Numeric Conventions ................................................ 40
Glossary .......................................................................... 40
Errata ............................................................................... 45
Part Numbers Affected .............................................. 45
CY8C21x45, CY8C22x45 Qualification Status .......... 45
Errata Summary ........................................................ 45
Document History Page ................................................. 47
Sales, Solutions, and Legal Information ...................... 49
Worldwide Sales and Design Support ....................... 49
Products .................................................................... 49
PSoC® Solutions ...................................................... 49
Cypress Developer Community ................................. 49
Technical Support ..................................................... 49
Document Number: 001-55397 Rev. *O
Page 2 of 49



Cypress Semiconductor CY8C22345H
CY8C21345/CY8C21645
CY8C22345/CY8C22345H/CY8C22645
PSoC Functional Overview
The PSoC programmable system-on-chip series of products
consists of many devices. These devices are designed to
replace multiple traditional MCU-based system components with
one low cost single-chip programmable device. PSoC devices
include configurable blocks of analog and digital logic, as well as
programmable interconnects. This architecture enables the user
to create customized peripheral configurations that match the
requirements of each individual application. Additionally, a fast
CPU, flash program memory, SRAM data memory, and
configurable I/O are included in a range of convenient pinouts
and packages.
The PSoC architecture, shown in the Block Diagram on page 1,
consists of four main areas: PSoC core, digital system, analog
system, and system resources. Configurable global busing
allows the combining of all the device resources into a complete
custom system. The PSoC family can have up to five I/O ports
connecting to the global digital and analog interconnects,
providing access to eight digital blocks [1] and six analog blocks.
PSoC Core
The PSoC core is a powerful engine that supports a rich feature
set. The core includes a CPU, memory, clocks, and configurable
GPIO.
The M8C CPU core is a powerful processor with speeds up to
24 MHz (up to 12 MHz for E-grade devices), providing four MIPS
(two MIPS for E-grade devices) 8-bit Harvard architecture
microprocessor. The CPU uses an interrupt controller to simplify
the programming of real time embedded events.
Program execution is timed and protected using the included
Sleep Timer and watchdog timer (WDT).
Memory encompasses 16 KB of flash (8 KB for CY8C21x45
devices) for program storage, 1 KB of SRAM (512 bytes for
CY8C21x45 devices) for data storage, and EEPROM emulation
using the flash. Program flash uses four protection levels on
blocks of 64 bytes, allowing customized software IP protection.
The PSoC device incorporates flexible internal clock generators,
including a 24-MHz internal main oscillator (IMO). For A-grade
devices the 24-MHz IMO can also be doubled to 48 MHz for use
by the digital system. A low-power 32-kHz internal low-speed
oscillator (ILO) is provided for the Sleep Timer and WDT. If
crystal accuracy is required, the 32.768 kHz external crystal
oscillator (ECO) is available for use as a RTC, and can optionally
generate a crystal-accurate 24-MHz system clock using a PLL.
The clocks, together with programmable clock dividers (as a
system resource), provide the flexibility to integrate almost any
timing requirement into the PSoC device.
PSoC GPIOs provide connection to the CPU, digital, and analog
resources of the device. Each pin’s drive mode may be selected
from eight options, allowing great flexibility in external
interfacing. Each pin can also generate a system interrupt.
Digital System
The digital system is composed of eight digital PSoC blocks.
Each block is an 8-bit resource that may be used alone or
combined with other blocks to form 8-, 16-, 24-, and 32-bit
peripherals, which are called user modules.
Figure 1. Digital System Block Diagram [1]
Port 4
Port 3
Port 2
Port 1
Port 0
8
8
Digital Clocks
From Core
To System Bus
To Analog
System
DIGITAL SYSTEM
Digital PSoC Block Array
Row 0
4
DBC00 DBC01 DCC02 DCC03
4
Row 1
DBC00 DBC01 DCC02 DCC03
8
8
GIE[7:0]
GIO[7:0]
Global Digital
Interconnect
GOE[7:0]
GOO[7:0]
Digital peripheral configurations are:
PWMs (8- to 16-bit)
PWMs with deadband (8- to 32-bit)
Counters (8- to 32-bit)
Timers (8- to 32-bit)
One-shot and multi-shot modules
Full or half-duplex 8-bit UART with selectable parity (up to two
full-duplex or four half-duplex)
SPI master and slave (up to four total) with programmable data
length from 8 to 16 bits.
Shift register (1- to 32-bit)
I2C master, slave, or multi-master (one available)
CRC/generator (16-bit)
IrDA (up to two)
PRS generators (8- to 32-bit)
Note
1. CY8C22x45 devices have 2 digital rows with 8 digital blocks. CY8C21x45 devices only have 1 digital row with 4 digital blocks.
Document Number: 001-55397 Rev. *O
Page 3 of 49







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)