Programmable System-on-Chip. CY8C24293 Datasheet

CY8C24293 System-on-Chip. Datasheet pdf. Equivalent

CY8C24293 Datasheet
Recommendation CY8C24293 Datasheet
Part CY8C24293
Description Programmable System-on-Chip
Feature CY8C24293; CY8C24X93 PSoC® Programmable System-on-Chip PSoC® Programmable System-on-Chip Features ■ Powerful H.
Manufacture Cypress Semiconductor
Datasheet
Download CY8C24293 Datasheet




Cypress Semiconductor CY8C24293
CY8C24X93
PSoC® Programmable System-on-Chip
PSoC® Programmable System-on-Chip
Features
Powerful Harvard-architecture processor
M8C CPU with a max speed of 24 MHz
Operating Range: 1.71 V to 5.5 V
Standby Mode 1.1 μA (Typ)
Deep Sleep 0.1 μA (Typ)
Operating Temperature range: –40 °C to +85 °C
Flexible on-chip memory
8 KB flash, 1 KB SRAM
16 KB flash, 2 KB SRAM
32 KB flash, 2 KB SRAM
Read while Write with EEPROM emulation
50,000 flash erase/write cycles
In-system programming simplifies manufacturing process
Four Clock Sources
Internal main oscillator (IMO): 6/12/24 MHz
Internal low-speed oscillator (ILO) at 32 kHz for watchdog
and sleep timers
External 32 KHz Crystal Oscillator
External Clock Input
Programmable pin configurations
Up to 36 general purpose dual mode GPIO (Analog inputs
and Digital I/O supported)
High sink current of 25 mA per GPIO
• Max sink current 120 mA for all GPIOs
Source Current
• 5 mA on ports 0 and 1
• 1 mA on ports 2,3 and 4
Configurable internal pull-up, high-Z and open drain modes
Selectable, regulated digital I/O on port 1
Configurable input threshold on port 1
Versatile Analog functions
Internal Low-Dropout voltage regulator for high power supply
rejection ratio (PSRR)
Full-Speed USB
12 Mbps USB 2.0 compliant
Eight unidirectional endpoints
One bidirectional endpoint
Dedicated 512 byte SRAM
No external crystal required
Additional system resources
I2C Slave:
• Selectable to 50 kHz, 100 kHz, or 400 kHz
Configurable up to 12 MHz SPI master and slave
Three 16-bit timers
Watchdog and sleep timers
Integrated supervisory circuit
10-bit incremental analog-to-digital converter (ADC) with
internal voltage reference
Two general-purpose Comparators
• 3 Voltage References (0.8 V, 1 V, 1.2 V)
• Any pin to either comparator inputs
• Low-power operation at 10 µA
One 8-bit IDAC with full scale range of 512 µA
One 8-bit Software PWM
Development Platform
PSoC Designer™ IDE
GPIOs and Package options
13 GPIOs - QFN 16
28 GPIOs - QFN 32
34 GPIOs - QFN 48
36 GPIOs - QFN 48
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-86894 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 27, 2017



Cypress Semiconductor CY8C24293
CY8C24X93
Logic Block Diagram
PSoC CORE
Port 4 Port 3
Port 2
Port 1
Port 0
1.8/2.5/3V PWRSYS [1]
LDO
(Regulator)
SYSTEM BUS
Global Analog Interconnect
1K/2K
SRAM
Interrupt
Controller
Supervisory ROM (SROM)
8K/16K/32K Flash
Nonvolatile Memory
CPU Core (M8C)
Sleep and
Watchdog
6/12/24 MHz Internal Main Oscillator
(IMO)
Internal Low Speed Oscillator (ILO)
Multiple Clock Sources
ANALOG
SYSTEM
SYSTEM BUS
ADC
Two
Comparators
IDAC
Analog
Reference
Analog Mux
USB
I2C
Slave
Internal
Voltage
References
System
Resets
POR
and
LVD
SPI
Master/
Slave
SYSTEM RESOURCES
Three 16-Bit
Programmable
Timers
Digital
Clocks
Note
1. Internal voltage regulator for internal circuitry.
Document Number: 001-86894 Rev. *D
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Cypress Semiconductor CY8C24293
CY8C24X93
More Information
Cypress provides a wealth of data at www.cypress.com to help you to select the right PSoC device for your design, and quickly and
effectively integrate the device into your design. For a comprehensive list of resources, see the knowledge base article “How to Design
with PSoC® 1, PowerPSoC®, and PLC – KBA88292”.
Overview: PSoC Portfolio, PSoC Roadmap
Product Selectors: PSoC 1, PSoC 3, PSoC 4, or PSoC 5LP.
In addition, PSoC Designer includes a device selection tool.
Application Notes and Code Examples: Cover a broad range
of topics, from basic to advanced level. Many of the application
notes include code examples.
Technical Reference Manuals (TRM): The TRM provides
complete detailed descriptions of the internal architecture of
the PSoC 1 devices.
Development Kits:
CY3215A-DK In-Circuit Emulation Lite Development Kit
includes an in-circuit emulator (ICE). While the ICE-Cube is
primarily used to debug PSoC 1 devices, it can also program
PSoC 1 devices using ISSP.
CY3210-PSOCEVAL1 Kit enables you to evaluate and
experiment Cypress’s PSoC 1 programmable
system-on-chip design methodology and architecture.
The MiniProg1 and MiniProg3 device provides an interface for
flash programming.
PSoC Designer
PSoC Designer is a free Windows-based Integrated Design
Environment (IDE). Develop your applications using a library of
pre-characterized analog and digital peripherals in a
drag-and-drop design environment. Then, customize your
design leveraging the dynamically generated API libraries of
code. Figure 1 shows PSoC Designer windows. Note: This is not
the default view.
1. Global Resources – all device hardware settings.
2. Parameters – the parameters of the currently selected User
Modules.
3. Pinout – information related to device pins.
4. Chip-Level Editor – a diagram of the resources available on
the selected chip.
5. Datasheet – the datasheet for the currently selected UM
6. User Modules – all available User Modules for the selected
device.
7. Device Resource Meter – device resource usage for the
current project configuration.
8. Workspace – a tree level diagram of files associated with the
project.
9. Output – output from project build and debug operations.
Note: For detailed information on PSoC Designer, go to PSoC®
Designer > Help > Documentation > Designer Specific
Documents > IDE User Guide.
Figure 1. PSoC Designer Layout
Document Number: 001-86894 Rev. *D
Page 3 of 65







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