8-bit Microcontrollers. MB95F168JA Datasheet

MB95F168JA Microcontrollers. Datasheet pdf. Equivalent

MB95F168JA Datasheet
Recommendation MB95F168JA Datasheet
Part MB95F168JA
Description 8-bit Microcontrollers
Feature MB95F168JA; FUJITSU SEMICONDUCTOR DATA SHEET DS07–12624–4E 8-bit Microcontrollers CMOS F2MC-8FX MB95160MA Seri.
Manufacture Fujitsu
Datasheet
Download MB95F168JA Datasheet




Fujitsu MB95F168JA
FUJITSU SEMICONDUCTOR
DATA SHEET
DS07–12624–4E
8-bit Microcontrollers
CMOS
F2MC-8FX MB95160MA Series
MB95168MA/F168MA/F168NA/F168JA/
MB95FV100D-103
DESCRIPTION
The MB95160MA series is general-purpose, single-chip microcontrollers. In addition to a compact instruction
set, the microcontrollers contain a variety of peripheral functions.
Note : F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
FEATURE
F2MC-8FX CPU core
Instruction set optimized for controllers
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instruction
• Bit manipulation instructions etc.
Clock
• Main clock
• Main PLL clock
• Sub clock
• Sub PLL clock
(Continued)
For the information for microcontroller supports, see the following web site.
This web site includes the "Customer Design Review Supplement" which provides the latest cautions
on system development and the minimal requirements to be checked to prevent problems before the
system development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2008-2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2011.1



Fujitsu MB95F168JA
MB95160MA Series
(Continued)
Timer
• 8/16-bit compound timer × 2 channels
Can be used to interval timer, PWC timer, PWM timer and input capture.
• 8/16-bit PPG × 2 channels
• 16-bit PPG × 1 channel
• Time-base timer × 1 channel
• Watch prescaler × 1 channel
LIN-UART × 1 channel
• LIN function, clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
• Full duplex double buffer
UART/SIO × 1 channel
• Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable
• Full duplex double buffer
I2C × 1 channel
Built-in wake-up function
External interrupt × 8 channels
• Interrupt by edge detection (rising, falling, or both edges can be selected)
• Can be used to recover from low-power consumption (standby) modes.
8/10-bit A/D converter × 8 channels
8-bit or 10-bit resolution can be selected.
LCD controller (LCDC)
• 32 SEG × 4 COM (Max 128 pixels)
• With blinking function
Low-power consumption (standby) mode
• Stop mode
• Sleep mode
• Watch mode
• Time-base timer mode
I/O port
• The number of maximum ports : Max 52
• Port configuration
- General-purpose I/O ports (N-ch open drain) : 2 ports
- General-purpose I/O ports (CMOS) : 50 ports
Programmable input voltage levels of port
Automotive input level / CMOS input level / hysteresis input level
Flash memory security function (Flash memory product only)
Protects the content of Flash memory
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Fujitsu MB95F168JA
MB95160MA Series
PRODUCT LINEUP
Part number
Parameter
Type
MB95168MA
Mask ROM
product
MB95F168MA
MB95F168NA
MB95F168JA
Flash memory product
ROM capacity
RAM capacity
Reset output
Yes/No
selectable
60 Kbytes
2 Kbytes
Yes
No
Clock system
Low voltage
detection reset
Clock supervisor
Yes/No
selectable
Yes/No
selectable
Dual clock
No
No
Yes
Yes
CPU functions
Ports (Max 52 ports)
Time-base timer
(1 channel)
Number of basic instructions
: 136
Instruction bit length
: 8 bits
Instruction length
: 1 to 3 bytes
Data bit length
: 1, 8, and 16 bits
Minimum instruction execution time : 61.5 ns (at machine clock frequency
16.25 MHz)
Interrupt processing time
: 0.6 μs (at machine clock frequency
16.25 MHz)
General-purpose I/O port (N-ch open drain) : 2 ports
General-purpose I/O port (CMOS)
: 50 ports
Programmable input voltage levels of port :
Automotive input level / CMOS input level / hysteresis input level
Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)
Watchdog timer
Wild register
I2C
(1 channel)
Reset generated cycle
At main oscillation clock 10 MHz
: Min 105 ms
At sub oscillation clock 32.768 kHz (for dual clock product) : Min 250 ms
Capable of replacing 3 bytes of ROM data
Master/slave sending and receiving
Bus error function and arbitration function
Detecting transmitting direction function
Start condition repeated generation and detection functions
Built-in wake-up function
UART/SIO
(1 channel)
Data transfer capable in UART/SIO
Full duplex double buffer,
variable data length (5/6/7/8-bit), built-in baud rate generator
NRZ type transfer format, error detected function
LSB-first or MSB-first can be selected.
Clock synchronous (SIO) or clock asynchronous (UART) serial data transfer ca-
pable
LIN-UART
(1 channel)
Dedicated reload timer allowing a wide range of communication speeds to be set.
Full duplex double buffer.
Capable of serial data transfer synchronous or asynchronous to clock signal.
LIN functions available as the LIN master or LIN slave.
8/10-bit A/D converter
(8 channels)
8-bit or 10-bit resolution can be selected.
(Continued)
DS07–12624–4E
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