CY2CP1504

CY2CP1504 1:4 LVCMOS to LVPECL Fanout Buffer with Selectable Clock Input 1:4 LVCMOS to LVPECL Fanout Buffer with Selectable Clock Input Features ■ Select one of two low-voltage complementary metal oxide semiconductor (LVCMOS) inputs to distribute to four low-voltage positive emitter-coupled logic (LVPECL) output pairs ■ 30-ps maximum output-to-output skew ■ 480-ps maximum propagation delay ■ 0.15-ps maximum additive RMS phase jitter at 156.25 MHz (12-kHz to 20-MHz offset) ■ Up to 250 MHz operation ■ Synchronous clock enable function ■ 20-Pin thin shrunk small outline package (TSSOP) package ■ 2.5-V or 3.3-V operating voltage [1] ■ Commercial and industrial operating temperature range Functional Description The CY2CP1504 is an ultra-low noise, low-skew, low-propagation delay 1:4 LVCMOS to LVPECL fanout buffer targeted to meet the requirements of high-speed clock distribution applications. The CY2CP1504 can select between two separate LVCMOS input clocks using the IN_...