Fanout Buffer. CY2DM1502 Datasheet

CY2DM1502 Buffer. Datasheet pdf. Equivalent

CY2DM1502 Datasheet
Recommendation CY2DM1502 Datasheet
Part CY2DM1502
Description 1:2 CML Fanout Buffer
Feature CY2DM1502; CY2DM1502 1:2 CML Fanout Buffer with Selectable Clock Input 1:2 CML Fanout Buffer with Selectable C.
Manufacture Cypress Semiconductor
Datasheet
Download CY2DM1502 Datasheet




Cypress Semiconductor CY2DM1502
CY2DM1502
1:2 CML Fanout Buffer
with Selectable Clock Input
1:2 CML Fanout Buffer with Selectable Clock Input
Features
One current mode logic (CML), High-speed current steering
logic (HCSL), or low-voltage positive emitter-coupled logic
(LVPECL) input pair distributed to two CML output pairs
20-ps maximum output-to-output skew
480-ps maximum propagation delay
0.15-ps maximum additive RMS phase jitter at 156.25 MHz
(12-kHz to 20-MHz offset)
Up to 1.5 GHz operation
8-pin thin shrunk small outline package (TSSOP) package
2.5-V or 3.3-V operating voltage [1]
Commercial and industrial operating temperature range
Functional Description
The CY2DM1502 is an ultra-low noise, low-skew,
low-propagation delay 1:2 CML, HCSL, or LVPECL to CML
fanout buffer targeted to meet the requirements of high-speed
clock distribution applications. The device has a fully differential
internal architecture that is optimized to achieve low additive jitter
and low skew at operating frequencies of up to 1.5 GHz.
For a complete list of related documentation, click here.
Logic Block Diagram
VDD
VSS
IN
IN#
VDD
Q0
Q0#
Q1
Q1#
Note
1. Input AC-coupling capacitors are required for voltage-translation applications.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-56315 Rev. *K
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 14, 2017



Cypress Semiconductor CY2DM1502
CY2DM1502
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 3
Absolute Maximum Ratings ............................................ 4
Operating Conditions ....................................................... 4
DC Electrical Specifications ............................................ 5
Thermal Resistance .......................................................... 5
AC Electrical Specifications ............................................ 6
Ordering Information ........................................................ 9
Ordering Code Definitions ........................................... 9
Package Diagram ............................................................ 10
Acronyms ........................................................................ 11
Document Conventions ................................................. 11
Units of Measure ....................................................... 11
Document History Page ................................................. 12
Sales, Solutions, and Legal Information ...................... 14
Worldwide Sales and Design Support ....................... 14
Products .................................................................... 14
PSoC®Solutions ....................................................... 14
Cypress Developer Community ................................. 14
Technical Support ..................................................... 14
Document Number: 001-56315 Rev. *K
Page 2 of 14



Cypress Semiconductor CY2DM1502
Pinouts
Figure 1. 8-pin TSSOP Package pinout
Q0 1
Q0# 2
Q1 3
Q1# 4
8 VDD
7 IN
6 IN#
5 VSS
Pin Definitions
Pin No.
1, 3
2, 4
5
6
7
8
Pin Name
Q(0:1)
Q(0:1)#
VSS
IN#
IN
VDD
Pin Type
Output
Output
Power
Input
Input
Power
Description
CML output clocks
CML complementary output clocks
Ground
CML/HCSL/LVPECL complementary input clock
CML/HCSL//LVPECL input clock
Power supply
CY2DM1502
Document Number: 001-56315 Rev. *K
Page 3 of 14







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