USB Controller. CYUSB3031 Datasheet

CYUSB3031 Controller. Datasheet pdf. Equivalent

CYUSB3031 Datasheet
Recommendation CYUSB3031 Datasheet
Part CYUSB3031
Description FX3S SuperSpeed USB Controller
Feature CYUSB3031; CYUSB303X EZ-USB® FX3S SuperSpeed USB Controller EZ-USB® FX3S SuperSpeed USB Controller Features ■ .
Manufacture Cypress Semiconductor
Datasheet
Download CYUSB3031 Datasheet




Cypress Semiconductor CYUSB3031
CYUSB303X
EZ-USB® FX3S SuperSpeed USB Controller
EZ-USB® FX3S SuperSpeed USB Controller
Features
Universal serial bus (USB) integration
USB 3.0 and USB 2.0 peripherals compliant with USB 3.0
specification 1.0
5-Gbps USB 3.0 PHY compliant with PIPE 3.0
High-speed On-The-Go (HS-OTG) host and peripheral
compliant with OTG Supplement Version 2.0
Thirty-two physical endpoints
General Programmable Interface (GPIF™ II)
Programmable 100-MHz GPIF II enables connectivity to a
wide range of external devices
8- and 16-bit data bus
As many as 16 configurable control signals
Mass storage support
SD 3.0 (SDXC) UHS-1
eMMC 4.41
Two ports that can support memory card sizes up to 2TB
Built-in RAID with support for RAID0 and RAID1
System I/O expansion with two secure digital I/O (SDIO 3.0)
ports
Support for USB-attached storage (UAS), mass-storage class
(MSC), human interface device (HID), full, and Turbo-MTP™
Fully accessible 32-bit CPU
ARM926EJ core with 200-MHz operation
512-KB or 256-KB embedded SRAM
Additional connectivity to the following peripherals
I2C master controller at 1 MHz
I2S master (transmitter only) at sampling frequencies of
8 kHz, 16 kHz, 32 kHz, 44.1 kHz, 96 kHz and 192 kHz
UART support of up to 4 Mbps
SPI master at 33 MHz
Selectable clock input frequencies
19.2, 26, 38.4, and 52 MHz
19.2-MHz crystal input support
Logic Block Diagram
Ultra low-power in core power-down mode
Less than 60 µA with VBATT on
20 µA with VBATT off
Independent power domains for core and I/O
Core operation at 1.2 V
I2S, UART, and SPI operation at 1.8 to 3.3 V
I2C operation at 1.2 V
10-mm × 10-mm, 0.8-mm pitch Pb-free ball grid array (BGA)
package
EZ-USB® software and development kit (DVK) for easy code
development
Applications
Digital video camcorders
Digital still cameras
Printers
Scanners
Video capture cards
Test and measurement equipment
Surveillance cameras
Personal navigation devices
Medical imaging devices
Video IP phones
Portable media players
Industrial cameras
RAID controller
USB Disk on Module
Functional Description
For a complete list of related resources, click here.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-84160 Rev. *J
• San Jose, CA 95134-1709 • 408-943-2600
Revised December 13, 2018



Cypress Semiconductor CYUSB3031
CYUSB303X
More Information
Cypress provides a wealth of data at www.cypress.com to help you to select the right <product> device for your design, and to help
you to quickly and effectively integrate the device into your design.
Overview: USB Portfolio, USB Roadmap
USB 3.0 Product Selectors: FX3, FX3S, CX3, HX3
Application notes: Cypress offers a large number of USB
application notes covering a broad range of topics, from basic
to advanced level. Recommended application notes for getting
started with FX3 are:
AN75705 - Getting Started with EZ-USB FX3
AN76405 - EZ-USB FX3 Boot Options
AN70707 - EZ-USB FX3/FX3S Hardware Design Guidelines
and Schematic Checklist
AN65974 - Designing with the EZ-USB FX3 Slave FIFO
Interface
AN75779 - How to Implement an Image Sensor Interface with
EZ-USB FX3 in a USB Video Class (UVC) Framework
AN86947 - Optimizing USB 3.0 Throughput with EZ-USB
FX3
AN84868 - Configuring an FPGA over USB Using Cypress
EZ-USB FX3
AN68829 - Slave FIFO Interface for EZ-USB FX3: 5-Bit
Address Mode
AN73609 - EZ-USB FX2LP/ FX3 Developing Bulk-Loop
Example on Linux
AN77960 - Introduction to EZ-USB FX3 High-Speed USB
Host Controller
AN76348 - Differences in Implementation of EZ-USB FX2LP
and EZ-USB FX3 Applications
AN89661 - USB RAID 1 Disk Design Using EZ-USB FX3S
Code Examples:
USB Hi-Speed
USB Full-Speed
USB SuperSpeed
Technical Reference Manual (TRM):
EZ-USB FX3 Technical Reference Manual
Development Kits:
CYUSB3KIT-003, EZ-USB FX3 SuperSpeed Explorer Kit
Models: IBIS
EZ-USB FX3 Software Development Kit
Cypress delivers the complete software and firmware stack for FX3, in order to easily integrate SuperSpeed USB into any embedded
application. The Software Development Kit (SDK) comes with tools, drivers and application examples, which help accelerate
application development.
GPIF™ II Designer
The GPIF II Designer is a graphical software that allows designers to configure the GPIF II interface of the EZ-USB FX3 USB 3.0
Device Controller.
The tool allows users the ability to select from one of five Cypress supplied interfaces, or choose to create their own GPIF II interface
from scratch. Cypress has supplied industry standard interfaces such as asynchronous and Synchronous Slave FIFO, Asynchronous
and Synchronous SRAM, and Asynchronous SRAM. Designers who already have one of these pre-defined interfaces in their system
can simply select the interface of choice, choose from a set of standard parameters such as bus width (x8, 16, x32) endianess, clock
settings, and compile the interface. The tool has a streamlined three step GPIF interface development process for users who need a
customized interface. Users are able to first select their pin configuration and standard parameters. Secondly, they can design a virtual
state machine using configurable actions. Finally, users can view output timing to verify that it matches the expected timing. Once the
three step process is complete, the interface can be compiled and integrated with FX3.
Document Number: 001-84160 Rev. *J
Page 2 of 61



Cypress Semiconductor CYUSB3031
CYUSB303X
Contents
Functional Overview ..........................................................4
Application Examples ....................................................4
USB Interface ......................................................................5
OTG ...............................................................................5
ReNumeration ...............................................................6
VBUS Overvoltage Protection .......................................6
Carkit UART Mode ........................................................6
Host Processor Interface (P-Port) .....................................7
GPIF II ...........................................................................7
Slave FIFO Interface .....................................................7
Asynchronous SRAM ....................................................7
Asynchronous Address/Data Multiplexed ......................8
Synchronous ADMux Interface ......................................8
Processor MMC (PMMC) Slave Interface .....................8
CPU ......................................................................................9
Storage Port (S-Port) ..........................................................9
SD/MMC Clock Stop .....................................................9
SD_CLK Output Clock Stop ..........................................9
Card Insertion and Removal Detection .........................9
Write Protection (WP) ....................................................9
SDIO Interrupt ...............................................................9
SDIO Read-Wait Feature ..............................................9
JTAG Interface ..................................................................10
Other Interfaces ................................................................10
UART Interface ............................................................10
I2C Interface ................................................................10
I2S Interface ................................................................10
SPI Interface ................................................................10
Boot Options .....................................................................11
Reset ..................................................................................11
Hard Reset ..................................................................11
Soft Reset ....................................................................11
Clocking ............................................................................12
32-kHz Watchdog Timer Clock Input ...........................12
Power .................................................................................13
Power Modes ..............................................................13
Configuration Options .....................................................15
Digital I/Os .........................................................................15
GPIOs .................................................................................15
System-level ESD .............................................................15
Pinouts ..............................................................................16
Pin Description .................................................................17
Electrical Specifications ..................................................21
Absolute Maximum Ratings .........................................21
Operating Conditions ...................................................21
DC Specifications ........................................................21
Thermal Characteristics ...................................................23
AC Timing Parameters .....................................................23
GPIF II lines AC characteristics at 100 MHz ...............23
GPIF II PCLK Jitter characteristics ..............................23
GPIF II Timing .............................................................24
Asynchronous SRAM Timing ......................................27
ADMux Timing for Asynchronous Access ...................30
Synchronous ADMux Timing .......................................32
Slave FIFO Interface ...................................................35
Asynchronous Slave FIFO
Read Sequence Description ...............................................37
Asynchronous Slave FIFO
Write Sequence Description ...............................................38
Storage Port Timing ....................................................41
Serial Peripherals Timing ............................................44
Reset Sequence ................................................................49
Package Diagram ..............................................................50
Ordering Information ........................................................51
Ordering Code Definitions ...........................................51
Acronyms ..........................................................................52
Document Conventions ...................................................52
Units of Measure .........................................................52
Errata .................................................................................53
Qualification Status .....................................................53
Errata Summary ..........................................................53
Document History Page ...................................................59
Sales, Solutions, and Legal Information ........................61
Worldwide Sales and Design Support .........................61
Products ......................................................................61
PSoC® Solutions ........................................................61
Cypress Developer Community ...................................61
Technical Support .......................................................61
Document Number: 001-84160 Rev. *J
Page 3 of 61







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