Radio-on-Chip LPstar. CYRF69303 Datasheet

CYRF69303 LPstar. Datasheet pdf. Equivalent

CYRF69303 Datasheet
Recommendation CYRF69303 Datasheet
Part CYRF69303
Description Programmable Radio-on-Chip LPstar
Feature CYRF69303; CYRF69303 Programmable Radio-on-Chip LPstar Programmable Radio-on-Chip LPstar Features ■ Radio Syst.
Manufacture Cypress Semiconductor
Datasheet
Download CYRF69303 Datasheet




Cypress Semiconductor CYRF69303
CYRF69303
Programmable Radio-on-Chip LPstar
Programmable Radio-on-Chip LPstar
Features
Radio System-on-Chip with built-in 8-bit MCU in a single
device.
Operates in the unlicensed worldwide Industrial, Scientific, and
Medical (ISM) band (2.400 GHz to 2.483 GHz).
On Air compatible with second generation radio
WirelessUSB™ LP and PRoC LP.
Pin-to-pin compatible with PRoC LP except the pin 31 and
pin 37.
Intelligent
M8C based 8-bit CPU, optimized for human interface devices
(HID) applications
256 bytes of SRAM
8 Kbytes of flash memory with EEPROM emulation
In-system reprogrammable through D+/D– pins
CPU speed up to 12 MHz
16-bit free running timer
Low power wakeup timer
12-bit programmable interval timer with interrupts
Watchdog timer
Low Power
21 mA operating current (Transmit at –5 dBm)
Sleep current less than 1 A
Operating voltage from 2.7 V to 3.6 V DC
Fast startup and fast channel changes
Supports coin cell operated applications
Reliable & Robust
Receive sensitivity typical –90 dBm
AutoRate™ - Dynamic Data Rate Reception
Enables data reception for any of the supported bit rates
automatically.
DSSS (250 Kbps), GFSK (1 Mbps)
Operating temperature from 0 °C to 70 °C
Closed-loop frequency synthesis for minimal frequency drift
Simple Development
Auto transaction sequencer (ATS): MCU can remain in sleep
state longer to save power
Framing, length, CRC16, and Auto ACK
Separate 16 byte transmit and receive FIFOs
Receive signal strength indication (RSSI)
Built-in serial peripheral interface (SPI) control while in Sleep
Mode
Advanced development tools based on Cypress’s PSoC® tools
Flexible I/O
2 mA source current on all GPIO pins. Configurable 8 mA or
50 mA/pin current sink on designated pins
Each GPIO pin supports high impedance inputs, configurable
pull up, open drain output, CMOS/TTL inputs, and CMOS
output
Maskable interrupts on all I/O pins
BOM Savings
Low external component count
Small footprint 40-pin QFN (6 mm × 6 mm)
GPIOs that require no external components
Operates off a single crystal
Applications
Wireless keyboards and mice
Presentation tools
Wireless gamepads
Remote controls
Toys
Fitness
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-66502 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 18, 2014



Cypress Semiconductor CYRF69303
Logic Block Diagram
VCC
Microcontroller
Function
P0_1,3,4,7
4
P1_0:2,6:7
5
P2_0:1
2
P1.5/MOSI
P1.4/SCK
P1.3/nSS
CYRF69303
VCC
Radio
Function
RFbias
RFp
RFn
IRQ/GPIO
MISO/GPIO
XOUT/GPIO
12 MHz
.....
.......
Document Number: 001-66502 Rev. *E
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Cypress Semiconductor CYRF69303
CYRF69303
Contents
Functional Description ..................................................... 4
Functional Overview ........................................................ 4
2.4 GHz Radio Function .............................................. 4
Data Transmission Modes ........................................... 4
Microcontroller Function .............................................. 4
Backward Compatibility ............................................... 4
Pinouts .............................................................................. 5
Pin Definitions .................................................................. 5
Functional Block Overview .............................................. 6
2.4 GHz Radio ............................................................. 6
Frequency Synthesizer ................................................ 6
Baseband and Framer ................................................. 6
Packet Buffers and Radio Configuration Registers ..... 7
Auto Transaction Sequencer (ATS) ............................ 7
Interrupts ..................................................................... 7
Clocks .......................................................................... 8
GPIO Interface ............................................................ 8
Power-on Reset ........................................................... 8
Timers ......................................................................... 8
Power Management .................................................... 8
Low Noise Amplifier (LNA) and
Received Signal Strength Indication (RSSI) ....................... 9
SPI Interface ...................................................................... 9
Three-Wire SPI Interface ............................................. 9
Four-Wire SPI Interface ............................................... 9
SPI Communication and Transactions ...................... 10
SPI I/O Voltage References ...................................... 10
SPI Connects to External Devices ............................ 10
CPU Architecture ............................................................ 11
CPU Registers ................................................................. 11
Flags Register ........................................................... 11
Accumulator Register ................................................ 12
Index Register ........................................................... 12
Stack Pointer Register ............................................... 12
CPU Program Counter High Register ....................... 12
CPU Program Counter Low Register ........................ 12
Addressing Modes ......................................................... 13
Source Immediate ..................................................... 13
Source Direct ............................................................. 13
Source Indexed ......................................................... 13
Destination Direct ...................................................... 13
Destination Indexed ................................................... 14
Destination Direct Source Immediate ........................ 14
Destination Indexed Source Immediate .................... 14
Destination Direct Source Direct ............................... 14
Source Indirect Post Increment ................................. 15
Destination Indirect Post Increment .......................... 15
Instruction Set Summary ............................................... 16
Memory Organization ..................................................... 17
Flash Program Memory Organization ....................... 17
Data Memory Organization ....................................... 18
Flash .......................................................................... 18
SROM ........................................................................ 18
SROM Function Descriptions .................................... 19
Clocking .......................................................................... 22
SROM Table Read Description ................................. 23
Clock Architecture Description .................................. 24
CPU Clock During Sleep Mode ................................. 28
Reset ................................................................................ 29
Power-on Reset ......................................................... 30
Watchdog Timer Reset .............................................. 30
Sleep Mode ...................................................................... 30
Sleep Sequence ........................................................ 30
Low Power in Sleep Mode ......................................... 31
Wakeup Sequence .................................................... 31
Power-on Reset Control ................................................. 33
POR Compare State ................................................. 33
ECO Trim Register .................................................... 33
General-Purpose I/O Ports ............................................. 34
Port Data Registers ................................................... 34
GPIO Port Configuration ........................................... 35
GPIO Configurations for Low Power Mode ............... 41
Serial Peripheral Interface (SPI) ................................ 42
SPI Data Register ...................................................... 43
SPI Configure Register .............................................. 43
SPI Interface Pins ...................................................... 45
Timer Registers .............................................................. 45
Registers ................................................................... 45
Interrupt Controller ......................................................... 48
Architectural Description ........................................... 48
Interrupt Processing .................................................. 49
Interrupt Latency ....................................................... 49
Interrupt Registers ..................................................... 49
Microcontroller Function Register Summary ............. 54
Radio Function Register Summary ............................... 56
Absolute Maximum Ratings .......................................... 57
DC Characteristics ......................................................... 57
AC Characteristics ......................................................... 59
Switching Waveforms .................................................... 60
RF Characteristics .......................................................... 63
Ordering Information ...................................................... 65
Ordering Code Definitions ......................................... 65
Package Handling ........................................................... 66
Package Diagrams .......................................................... 66
Acronyms ........................................................................ 68
Document Conventions ................................................. 68
Units of Measure ....................................................... 68
Document History Page ................................................. 69
Sales, Solutions, and Legal Information ...................... 70
Worldwide Sales and Design Support ....................... 70
Products .................................................................... 70
PSoC® Solutions ...................................................... 70
Cypress Developer Community ................................. 70
Technical Support ..................................................... 70
Document Number: 001-66502 Rev. *E
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