CY7C1382KV33

CY7C1380KV33 CY7C1382KV33 18-Mbit (512K × 36/1M × 18) Pipelined SRAM 18-Mbit (512K × 36/1M × 18) Pipelined SRAM Features ■ Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200, and 167 MHz ■ Registered inputs and outputs for pipelined operation ■ 3.3 V core power supply ■ 2.5 V or 3.3 V I/O power supply ■ Fast clock-to-output times ❐ 2.5 ns (for 250 MHz device) ■ Provides high performance 3-1-1-1 access rate ■ Separate processor and controller address strobes ■ Synchronous self-timed write ■ Asynchronous output enable ■ Single cycle chip deselect ■ Available in JEDEC-standard Pb-free 100-pin TQFP and non Pb-free 165-ball FBGA package. ■ IEEE 1149.1 JTAG-Compatible Boundary Scan ■ ZZ sleep mode option Functional Description The CY7C1380KV33/CY7C1382KV33 SRAM integrates 524,288 × 36 and 1,048,576 × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inp...