CY7C1363D

CY7C1363D 9-Mbit (512K × 18) Flow-Through SRAM 9-Mbit (512K × 18) Flow-Through SRAM Features ■ Supports 133 MHz bus operations ■ 512K × 18 common I/O ■ 3.3 V – 5% and +10% core power supply (VDD) ■ 2.5 V or 3.3 V I/O power supply (VDDQ) ■ Fast clock-to-output times ❐ 6.5 ns (133-MHz version) ■ Provide high performance 2-1-1-1 access rate ■ User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences ■ Separate processor and controller address strobes ■ Synchronous self-timed write ■ Asynchronous output enable ■ Available in Pb-free 100-pin TQFP package ■ TQFP available with 3-chip enable ■ “ZZ” sleep mode option Functional Description The CY7C1363D is a 3.3 V, 512K × 18 synchronous flow-through SRAM, respectively designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip counter captures the first addres...