9-Mbit Pipelined SRAM
CY7C1360C CY7C1362C
9-Mbit (256K × 36/512K × 18) Pipelined SRAM
9-Mbit (256K × 36/512K × 18) Pipelined SRAM
Features
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Description
CY7C1360C CY7C1362C
9-Mbit (256K × 36/512K × 18) Pipelined SRAM
9-Mbit (256K × 36/512K × 18) Pipelined SRAM
Features
■ Supports bus operation up to 200 MHz ■ Available speed grades: 200 MHz, and 166 MHz ■ Registered inputs and outputs for pipelined operation ■ 3.3 V core power supply (VDD) ■ 2.5 V/3.3 V I/O operation (VDDQ) ■ Fast clock-to-output times
❐ 3.0 ns (for 200 MHz device) ■ Provide high performance 3-1-1-1 access rate ■ User selectable burst counter supporting Intel Pentium®
interleaved or linear burst sequences ■ Separate processor and controller address strobes ■ Synchronous self-timed writes ■ Asynchronous output enable ■ Single cycle chip deselect ■ Available in Pb-free 100-pin TQFP package, non Pb-free
119-ball BGA package, and 165-ball FBGA package ■ TQFP available with 3-chip enable and 2-chip enable ■ IEEE 1149.1 JTAG-compatible boundary scan
Functional Description
The CY7C1360C/CY7C1362C SRAM integrates 256K × 36 and
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