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CY7C2245KV18
36-Mbit QDR II+ SRAM Four-Word Burst Architecture
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CY7C2245KV18 36-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) with ODT 36-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 450 MHz clock for high bandwidth ■ Four-word burst for reducing address bus frequ...
Cypress Semiconductor
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CY7C2245KV18
36-Mbit QDR II+ SRAM Four-Word Burst Architecture
- Cypress Semiconductor
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