CYRS1543AV18

72-Mbit QDR® II+ SRAM Four-Word Burst Architecture with RadStop™ Technology Radiation Performance Radiation Data ■ Total Dose =300 Krad ■ Soft error rate (both Heavy Ion and proton) Heavy ions  1 × 10-10 upsets/bit-day with an external SECDED EDAC Controller ■ Neutrons = 2.0 × 1014 N/cm2 ■ Dose rate = 2.0 × 109 rad(Si)/sec ■ Dose rate survivability (rad(Si)/sec) = 1.5 × 10^11 (rad(Si)/sec ■ Latch up immunity = 120 MeV.cm2/mg (125 °C) Prototyping Options ■ Non-qualified CYPT1543AV18, and CYPT1545AV18 devices with same functional and timing characteristics in a 165-ball Ceramic Column Grid Array (CCGA) package and Land Grid Array (LGA) package without solder columns attached. Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■ Four-word burst for reducing address bus frequency ■ Double data rate (DDR) interfaces on both read and write ports at 250 MHz (data transferred at 500 MHz) ■ Two input clocks (K and K) for precise DDR timing ❐ SRAM uses rising edges only ■ Echo clocks (CQ and CQ) simplify data capture in high speed systems ■ Single multiplexed address input bus latches address inputs for read and write ports ■ Separate port selects for depth expansion ■ Synchronous internally self-timed writes ■ QDR® II+ operates with 2.0 cycle read latency when the delay lock loop (DLL) is enabled ■ Available in × 18, and × 36 configurations ■ Full data coherency, providing most current data ■ Core VDD = 1.8...