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Static RAM. CY62157H Datasheet

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Static RAM. CY62157H Datasheet






CY62157H RAM. Datasheet pdf. Equivalent




CY62157H RAM. Datasheet pdf. Equivalent





Part

CY62157H

Description

8-Mbit (512K words x 16 bit) Static RAM



Feature


CY62157H MoBL® 8-Mbit (512K words × 16 bit) Static RAM with Error Correcting Code (ECC) 8-Mbit (512K words × 16 bi t) Static RAM with Error Correcting Cod e (ECC) Features ■ Ultra-low standby current ❐ Typical standby current: 5. 5A ❐ Maximum standby current: 1 6 A ■ High speed: 45 ns ■ Voltag e range: 2.2 V to 3.6 V ■ Embedded Er ror Correcting Code (ECC) for single-bi.
Manufacture

Cypress Semiconductor

Datasheet
Download CY62157H Datasheet


Cypress Semiconductor CY62157H

CY62157H; t error correction ■ 1.0 V data retent ion ■ Transistor-transistor logic (TT L) compatible inputs and outputs ■ Av ailable in Pb-free 48-ball VFBGA and 48 -pin TSOP I packages Functional Descrip tion CY62157H is a high-performance CMO S low-power (MoBL) SRAM device with Emb edded Error Correcting Code. ECC logic can detect and correct single bit error in accessed location. T.


Cypress Semiconductor CY62157H

his device is offered in dual chip enabl e option. Dual chip enable devices are accessed by asserting both chip enable inputs – CE1 as LOW and CE2 as HIGH. Data writes are performed by asserting the Write Enable input (WE LOW), and .


Cypress Semiconductor CY62157H

.

Part

CY62157H

Description

8-Mbit (512K words x 16 bit) Static RAM



Feature


CY62157H MoBL® 8-Mbit (512K words × 16 bit) Static RAM with Error Correcting Code (ECC) 8-Mbit (512K words × 16 bi t) Static RAM with Error Correcting Cod e (ECC) Features ■ Ultra-low standby current ❐ Typical standby current: 5. 5A ❐ Maximum standby current: 1 6 A ■ High speed: 45 ns ■ Voltag e range: 2.2 V to 3.6 V ■ Embedded Er ror Correcting Code (ECC) for single-bi.
Manufacture

Cypress Semiconductor

Datasheet
Download CY62157H Datasheet




 CY62157H
CY62157H MoBL®
8-Mbit (512K words × 16 bit) Static RAM
with Error Correcting Code (ECC)
8-Mbit (512K words × 16 bit) Static RAM with Error Correcting Code (ECC)
Features
Ultra-low standby current
Typical standby current: 5.5A
Maximum standby current: 16 A
High speed: 45 ns
Voltage range: 2.2 V to 3.6 V
Embedded Error Correcting Code (ECC) for single-bit error
correction
1.0 V data retention
Transistor-transistor logic (TTL) compatible inputs and outputs
Available in Pb-free 48-ball VFBGA and 48-pin TSOP I
packages
Functional Description
CY62157H is a high-performance CMOS low-power (MoBL)
SRAM device with Embedded Error Correcting Code. ECC logic
can detect and correct single bit error in accessed location.
This device is offered in dual chip enable option. Dual chip
enable devices are accessed by asserting both chip enable
inputs – CE1 as LOW and CE2 as HIGH.
Data writes are performed by asserting the Write Enable input
(WE LOW), and providing the data and address on device data
(I/O0 through I/O15) and address (A0 through A18) pins
respectively. The Byte High/Low Enable (BHE, BLE) inputs
control byte writes, and write data on the corresponding I/O lines
to the memory location specified. BHE controls I/O8 through
I/O15 and BLE controls I/O0 through I/O7.
Data reads are performed by asserting the Output Enable (OE)
input and providing the required address on the address lines.
Read data is accessible on I/O lines (I/O0 through I/O15). Byte
accesses can be performed by asserting the required byte
enable signal (BHE, BLE) to read either the upper byte or the
lower byte of data from the specified address location.
All I/Os (I/O0 through I/O15) are placed in a high impedance state
when the device is deselected (CE1 HIGH / CE2 LOW for dual
chip enable device), or control signals are de-asserted (OE, BLE,
BHE).
These devices also have a unique “Byte Power down” feature,
where, if both the Byte Enables (BHE and BLE) are disabled, the
devices seamlessly switch to standby mode irrespective of the
state of the chip enable(s), thereby saving power.
The CY62157H device is available in a Pb-free 48-ball VFBGA
and 48-pin TSOP I packages. The logic block diagram is on
page 2.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-88316 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised September 6, 2016




 CY62157H
Logic Block Diagram
ECC ENCODER
DATAIN DRIVERS
A0
A1
A2
A3
A4
A5
512K x 16
RAM ARRAY
A6
A7
A8
A9
COLUMN DECODER
POWER DOWN
CIRCUIT
CE
BHE
BLE
CY62157H MoBL®
I/O0-I/O7
I/O8-I/O15
BYTE
BHE
WE
OE
BLE
CE2
CE1
Document Number: 001-88316 Rev. *D
Page 2 of 21




 CY62157H
CY62157H MoBL®
Contents
Pin Configurations ........................................................... 4
Product Portfolio .............................................................. 5
Maximum Ratings ............................................................. 6
Operating Range ............................................................... 6
DC Electrical Characteristics .......................................... 6
Capacitance ...................................................................... 7
Thermal Resistance .......................................................... 7
AC Test Loads and Waveforms ....................................... 7
Data Retention Characteristics ....................................... 8
Data Retention Waveform ................................................ 8
Switching Characteristics ................................................ 9
Switching Waveforms .................................................... 10
Truth Table – CY62157H ................................................ 15
Ordering Information ...................................................... 16
Ordering Code Definitions ......................................... 16
Package Diagrams .......................................................... 17
Acronyms ........................................................................ 19
Document Conventions ................................................. 19
Units of Measure ....................................................... 19
Document History Page ................................................. 20
Sales, Solutions, and Legal Information ...................... 21
Worldwide Sales and Design Support ....................... 21
Products .................................................................... 21
PSoC®Solutions ....................................................... 21
Cypress Developer Community ................................. 21
Technical Support ..................................................... 21
Document Number: 001-88316 Rev. *D
Page 3 of 21






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