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SPI F-RAM. FM25V20A Datasheet

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SPI F-RAM. FM25V20A Datasheet






FM25V20A F-RAM. Datasheet pdf. Equivalent




FM25V20A F-RAM. Datasheet pdf. Equivalent





Part

FM25V20A

Description

2-Mbit (256 K x 8) Serial (SPI) F-RAM



Feature


FM25V20A 2-Mbit (256 K × 8) Serial (SPI ) F-RAM with Extended Temperature 2-Mb it (256 K × 8) Serial (SPI) Automotive F-RAM Features ■ 2-Mbit ferroelectri c random access memory (F-RAM) logicall y organized as 256 K × 8 ❐ High-endu rance 10 trillion (1014) read/writes 121-year data retention (See the Data Retention and Endurance table) ❐ NoD elay™ writes ❐ Advanced high-.
Manufacture

Cypress Semiconductor

Datasheet
Download FM25V20A Datasheet


Cypress Semiconductor FM25V20A

FM25V20A; reliability ferroelectric process ■ Ve ry fast serial peripheral interface (SP I) ❐ Up to 33 MHz frequency ❐ Direc t hardware replacement for serial flash and EEPROM ❐ Supports SPI mode 0 (0, 0) and mode 3 (1, 1) ■ Sophisticated write protection scheme ❐ Hardware p rotection using the Write Protect (WP) pin ❐ Software protection using Write Disable instruction ❐ Software .


Cypress Semiconductor FM25V20A

block protection for 1/4, 1/2, or entire array ■ Device ID ❐ Manufacturer I D and Product ID ■ Low power consumpt ion ❐ 3 mA active current at 33 MHz 400 A standby current ❐ 12 A sleep mode current ■ Low-volta .


Cypress Semiconductor FM25V20A

.

Part

FM25V20A

Description

2-Mbit (256 K x 8) Serial (SPI) F-RAM



Feature


FM25V20A 2-Mbit (256 K × 8) Serial (SPI ) F-RAM with Extended Temperature 2-Mb it (256 K × 8) Serial (SPI) Automotive F-RAM Features ■ 2-Mbit ferroelectri c random access memory (F-RAM) logicall y organized as 256 K × 8 ❐ High-endu rance 10 trillion (1014) read/writes 121-year data retention (See the Data Retention and Endurance table) ❐ NoD elay™ writes ❐ Advanced high-.
Manufacture

Cypress Semiconductor

Datasheet
Download FM25V20A Datasheet




 FM25V20A
FM25V20A
2-Mbit (256 K × 8) Serial (SPI) F-RAM
FM25V20A, 2-Mbit (256 K X 8) Serial (SPI) F-RAM
Features
2-Mbit ferroelectric random access memory (F-RAM) logically
organized as 256 K × 8
High-endurance 100 trillion (1014) read/writes
151-year data retention (See the Data Retention and Endur-
ance table)
NoDelay™ writes
Advanced high-reliability ferroelectric process
Very fast SPI
Up to 40-MHz frequency
Direct hardware replacement for serial flash and EEPROM
Supports SPI mode 0 (0, 0) and mode 3 (1, 1)
Sophisticated write protection scheme
Hardware protection using the Write Protect (WP) pin
Software protection using Write Disable instruction
Software block protection for 1/4, 1/2, or entire array
Device ID
Manufacturer ID and Product ID
Low power consumption
300 µA active current at 1 MHz
100 µA (typ) standby current
3 µA sleep mode current
Low-voltage operation: VDD = 2.0 V to 3.6 V
Industrial temperature: –40 C to +85 C
Packages
8-pin small outline integrated circuit (SOIC) package
8-pin dual flat no leads (DFN) package
Restriction of hazardous substances (RoHS) compliant
Functional Overview
The FM25V20A is a 2-Mbit nonvolatile memory employing an
advanced ferroelectric process. A ferroelectric random access
memory or F-RAM is nonvolatile and performs reads and writes
similar to a RAM. It provides reliable data retention for 151 years
while eliminating the complexities, overhead, and system-level
reliability problems caused by serial flash, EEPROM, and other
nonvolatile memories.
Unlike serial flash and EEPROM, the FM25V20A performs write
operations at bus speed. No write delays are incurred. Data is
written to the memory array immediately after each byte is
successfully transferred to the device. The next bus cycle can
commence without the need for data polling. In addition, the
product offers substantial write endurance compared with other
nonvolatile memories. The FM25V20A is capable of supporting
1014 read/write cycles, or 100 million times more write cycles
than EEPROM.
These capabilities make the FM25V20A ideal for nonvolatile
memory applications, requiring frequent or rapid writes.
Examples range from data collection, where the number of write
cycles may be critical, to demanding industrial controls where the
long write time of serial flash or EEPROM can cause data loss.
The FM25V20A provides substantial benefits to users of serial
EEPROM or flash as a hardware drop-in replacement. The
FM25V20A uses the high-speed SPI bus, which enhances the
high-speed write capability of F-RAM technology. The device
incorporates a read-only Device ID that allows the host to
determine the manufacturer, product density, and product
revision. The device specifications are guaranteed over an
industrial temperature range of –40 C to +85 C.
For a complete list of related documentation, click here.
Logic Block Diagram
WP
CS
SCK
Instruction Decoder
Clock Generator
Control Logic
Write Protect
256 K x 8
FRAM Array
Instruction Register
Address Register
Counter
18
8
SI
Data I/O Register
SO
3
Nonvolatile Status
Register
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-90261 Rev. *H
• San Jose, CA 95134-1709 • 408-943-2600
Revised May 15, 2019




 FM25V20A
FM25V20A
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 3
Overview ............................................................................ 4
Memory Architecture ................................................... 4
Serial Peripheral Interface – SPI Bus .......................... 4
SPI Overview ............................................................... 4
SPI Modes ................................................................... 5
Power Up to First Access ............................................ 5
Command Structure .................................................... 6
WREN - Set Write Enable Latch ................................. 6
WRDI - Reset Write Enable Latch ............................... 6
Status Register and Write Protection ............................. 7
RDSR - Read Status Register ..................................... 7
WRSR - Write Status Register .................................... 8
Memory Operation ............................................................ 9
Write Operation ........................................................... 9
Read Operation ........................................................... 9
Fast Read Operation ................................................... 9
Sleep Mode ............................................................... 10
Device ID ................................................................... 10
Endurance ................................................................. 11
Maximum Ratings ........................................................... 12
Operating Range ............................................................. 12
DC Electrical Characteristics ........................................ 12
Data Retention and Endurance ..................................... 13
Capacitance .................................................................... 13
Thermal Resistance ........................................................ 13
AC Test Conditions ........................................................ 13
AC Switching Characteristics ....................................... 14
Power Cycle Timing ....................................................... 15
Ordering Information ...................................................... 16
Ordering Code Definitions ......................................... 16
Package Diagrams .......................................................... 17
Acronyms ........................................................................ 19
Document Conventions ................................................. 19
Units of Measure ....................................................... 19
Document History Page ................................................. 20
Sales, Solutions, and Legal Information ...................... 21
Worldwide Sales and Design Support ....................... 21
Products .................................................................... 21
PSoC® Solutions ...................................................... 21
Cypress Developer Community ................................. 21
Technical Support ..................................................... 21
Document Number: 001-90261 Rev. *H
Page 2 of 21




 FM25V20A
FM25V20A
Pinouts
Figure 1. 8-pin SOIC Pinout
CS 1
8
SO 2 Top View 7
not to scale
WP 3
6
VSS 4
5
VDD
HDONULD
SCK
SI
Figure 2. 8-pin DFN Pinout
CS 1
SO 2
WP 3
EXPOSED
PAD
8 VDD
7 DHNOULD
6 SCK
VSS 4
5 SI
Top View
not to scale
Pin Definitions
Pin Name
I/O Type
Description
CS
Input
Chip Select. This active LOW input activates the device. When HIGH, the device enters low-power
standby mode, ignores other inputs, and the output is tristated. When LOW, the device internally
activates the SCK signal. A falling edge on CS must occur before every opcode.
SCK
SI[1]
SO[1]
Input
Input
Output
Serial Clock. All I/O activity is synchronized to the serial clock. Inputs are latched on the rising
edge and outputs occur on the falling edge. Because the device is synchronous, the clock
frequency may be any value between 0 and 40 MHz and may be interrupted at any time.
Serial Input. All data is input to the device on this pin. The pin is sampled on the rising edge of
SCK and is ignored at other times. It should always be driven to a valid logic level to meet IDD
specifications.
Serial Output. This is the data output pin. It is driven during a read and remains tristated at all
other times. Data transitions are driven on the falling edge of the serial clock.
WP
DNU
VSS
VDD
EXPOSED PAD
Input
Write Protect. This Active LOW pin prevents write operation to the Status Register when WPEN
is set to ‘1’. This is critical because other write protection features are controlled through the Status
Register. A complete explanation of write protection is provided in Status Register and Write
Protection on page 7. This pin must be tied to VDD if not used.
Do Not Use Do Not Use. Either leave this pin floating (not connected on the board) or tie to VDD.
Power Supply Ground for the device. Must be connected to the ground of the system.
Power Supply Power supply input to the device.
No Connect The EXPOSED PAD on the bottom of 8-pin DFN package is not connected to the die. The
EXPOSED PAD should not be soldered on the PCB.
Note
1. SI may be connected to SO for a single pin data interface.
Document Number: 001-90261 Rev. *H
Page 3 of 21



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