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Static RAM. CY7C10612DV33 Datasheet

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Static RAM. CY7C10612DV33 Datasheet






CY7C10612DV33 RAM. Datasheet pdf. Equivalent




CY7C10612DV33 RAM. Datasheet pdf. Equivalent





Part

CY7C10612DV33

Description

16-Mbit (1M x 16) Static RAM



Feature


CY7C10612DV33 16-Mbit (1M × 16) Static RAM 16-Mbit (1M × 16) Static RAM Feat ures ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 175 mA at 1 00 MHz ■ Low CMOS standby power ❐ I SB2 = 25 mA ■ Operating voltages of 3 .3 ± 0.3 V ■ 2.0 V data retention Automatic Power-down when deselected ■ TTL compatible inputs and outputs Easy memory expansion with CE and OE fea.
Manufacture

Cypress Semiconductor

Datasheet
Download CY7C10612DV33 Datasheet


Cypress Semiconductor CY7C10612DV33

CY7C10612DV33; tures ■ Available in Pb-free 54-pin TS OP II package Logic Block Diagram A0 A 1 A2 A3 A4 A5 A6 A7 A8 A9 INPUT BUFFER 1M x 16 ARRAY COLUMN DECODER ROW DECO DER SENSE AMPS Functional Description The CY7C10612DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits. To write to the devi ce, take Chip Enables (CE) and Write En able (WE) input LOW..


Cypress Semiconductor CY7C10612DV33

If Byte Low Enable (BLE) is LOW, then d ata from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A19). I f Byte High Enable (BHE) is LOW, then d ata from I/O pins (I/O8 through I/O15 .


Cypress Semiconductor CY7C10612DV33

.

Part

CY7C10612DV33

Description

16-Mbit (1M x 16) Static RAM



Feature


CY7C10612DV33 16-Mbit (1M × 16) Static RAM 16-Mbit (1M × 16) Static RAM Feat ures ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 175 mA at 1 00 MHz ■ Low CMOS standby power ❐ I SB2 = 25 mA ■ Operating voltages of 3 .3 ± 0.3 V ■ 2.0 V data retention Automatic Power-down when deselected ■ TTL compatible inputs and outputs Easy memory expansion with CE and OE fea.
Manufacture

Cypress Semiconductor

Datasheet
Download CY7C10612DV33 Datasheet




 CY7C10612DV33
CY7C10612DV33
16-Mbit (1M × 16) Static RAM
16-Mbit (1M × 16) Static RAM
Features
High speed
tAA = 10 ns
Low active power
ICC = 175 mA at 100 MHz
Low CMOS standby power
ISB2 = 25 mA
Operating voltages of 3.3 ± 0.3 V
2.0 V data retention
Automatic Power-down when deselected
TTL compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in Pb-free 54-pin TSOP II package
Logic Block Diagram
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
INPUT BUFFER
1M x 16
ARRAY
COLUMN
DECODER
Functional Description
The CY7C10612DV33 is a high performance CMOS Static RAM
organized as 1,048,576 words by 16 bits.
To write to the device, take Chip Enables (CE) and Write Enable
(WE) input LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O0 through I/O7), is written into the location
specified on the address pins (A0 through A19). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O8 through
I/O15) is written into the location specified on the address pins
(A0 through A19).
To read from the device, take Chip Enables (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on I/O0 to I/O7. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O8 to I/O15. See Truth Table on page 10 for a
complete description of Read and Write modes.
The input or output pins (I/O0 through I/O15) are placed in a high
impedance state when the device is deselected (CE HIGH), the
outputs are disabled (OE HIGH), the BHE and BLE are disabled
(BHE, BLE HIGH), or during a write operation (CE LOW and WE
LOW).
The CY7C10612DV33 is available in a 54-pin TSOP II package
with center power and ground (revolutionary) pinout.
For a complete list of related documentation, click here.
I/O0–I/O7
I/O8–I/O15
BHE
WE
CE
OE
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-49315 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 29, 2016




 CY7C10612DV33
CY7C10612DV33
Contents
Selection Guide ................................................................ 3
Pin Configuration ............................................................. 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
DC Electrical Characteristics .......................................... 4
Capacitance ...................................................................... 4
Thermal Resistance .......................................................... 4
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 5
Data Retention Waveform ................................................ 5
AC Switching Characteristics ......................................... 6
Switching Waveforms ...................................................... 7
Truth Table ...................................................................... 10
Ordering Information ...................................................... 10
Ordering Code Definitions ......................................... 10
Package Diagrams .......................................................... 11
Acronyms ........................................................................ 12
Document Conventions ................................................. 12
Units of Measure ....................................................... 12
Document History Page ................................................. 13
Sales, Solutions, and Legal Information ...................... 14
Worldwide Sales and Design Support ....................... 14
Products .................................................................... 14
PSoC Solutions ......................................................... 14
Document Number: 001-49315 Rev. *E
Page 2 of 14




 CY7C10612DV33
Selection Guide
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Pin Configuration
Description
Figure 1. 54-pin TSOP II (Top View) [1]
I/O12
VCC
I/O13
I/O14
VSS
I/O15
A4
A3
A2
A1
A0
BHE
CE
VCC
WE
NC
A19
A18
A17
A16
A15
I/O0
VCC
I/O1
I/O2
VSS
I/O3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54 I/O11
53 VSS
52 I/O10
51 I/O9
50 VCC
49 I/O8
48 A5
47 A6
46 A7
45 A8
44 A9
43 NC
42 OE
41 VSS
40 NC
39 BLE
38 A10
37 A11
36 A12
35 A13
34 A14
33 I/O7
32 VSS
31 I/O6
30 I/O5
29 VCC
28 I/O4
CY7C10612DV33
-10 Unit
10 ns
175 mA
25 mA
Note
1. NC pins are not connected on the die.
Document Number: 001-49315 Rev. *E
Page 3 of 14



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