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SoftStore nvSRAM. STK11C88 Datasheet

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SoftStore nvSRAM. STK11C88 Datasheet






STK11C88 nvSRAM. Datasheet pdf. Equivalent




STK11C88 nvSRAM. Datasheet pdf. Equivalent





Part

STK11C88

Description

256 Kbit (32 K x 8) SoftStore nvSRAM



Feature


Not recommended for new designs. In prod uction to support ongoing production pr ograms only. STK11C88 256 Kbit (32 K x 8) SoftStore nvSRAM Features ■ 25 n s and 45 ns Access Times ■ Pin Compat ible with Industry Standard SRAMs ■ S oftware initiated STORE and RECALL ■ Automatic RECALL to SRAM on Power Up Unlimited Read and Write endurance Unlimited RECALL Cycles ■ 1,.
Manufacture

Cypress Semiconductor

Datasheet
Download STK11C88 Datasheet


Cypress Semiconductor STK11C88

STK11C88; 000,000 STORE Cycles ■ 100 year Data R etention ■ Single 5 V+10% Power Suppl y ■ Commercial and Industrial Tempera tures ■ 28-pin (300 mil and 330 mil) SOIC packages ■ RoHS compliance Func tional Description The Cypress STK11C88 is a 256 Kb fast static RAM with a non volatile element in each memory cell. T he embedded nonvolatile elements incorp orate QuantumTrap technology.


Cypress Semiconductor STK11C88

producing the world’s most reliable n onvolatile memory. The SRAM provides un limited read and write cycles, while in dependent, nonvolatile data resides in the highly reliable QuantumTrap cell. D ata transfers under Software control fr o .


Cypress Semiconductor STK11C88

.

Part

STK11C88

Description

256 Kbit (32 K x 8) SoftStore nvSRAM



Feature


Not recommended for new designs. In prod uction to support ongoing production pr ograms only. STK11C88 256 Kbit (32 K x 8) SoftStore nvSRAM Features ■ 25 n s and 45 ns Access Times ■ Pin Compat ible with Industry Standard SRAMs ■ S oftware initiated STORE and RECALL ■ Automatic RECALL to SRAM on Power Up Unlimited Read and Write endurance Unlimited RECALL Cycles ■ 1,.
Manufacture

Cypress Semiconductor

Datasheet
Download STK11C88 Datasheet




 STK11C88
STK11C88
256 Kbit (32 K x 8) SoftStore nvSRAM
Features
25 ns and 45 ns Access Times
Pin Compatible with Industry Standard SRAMs
Software initiated STORE and RECALL
Automatic RECALL to SRAM on Power Up
Unlimited Read and Write endurance
Unlimited RECALL Cycles
1,000,000 STORE Cycles
100 year Data Retention
Single 5 V+10% Power Supply
Commercial and Industrial Temperatures
28-pin (300 mil and 330 mil) SOIC packages
RoHS compliance
Functional Description
The Cypress STK11C88 is a 256 Kb fast static RAM with a
nonvolatile element in each memory cell. The embedded
nonvolatile elements incorporate QuantumTrap technology
producing the world’s most reliable nonvolatile memory. The
SRAM provides unlimited read and write cycles, while
independent, nonvolatile data resides in the highly reliable
QuantumTrap cell. Data transfers under Software control from
SRAM to the nonvolatile elements (the STORE operation). On
power up, data is automatically restored to the SRAM (the
RECALL operation) from the nonvolatile memory. RECALL
operations are also available under software control.
For a complete list of related documentation, click here.
Logic Block Diagram
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-50591 Rev. *F
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 20, 2015




 STK11C88
STK11C88
Contents
Pin Configurations ........................................................... 3
Device Operation .............................................................. 4
SRAM Read ....................................................................... 4
SRAM Write ....................................................................... 4
Software STORE ............................................................... 4
Software RECALL............................................................. 4
Hardware RECALL (Power Up)........................................ 4
Hardware Protect.............................................................. 5
Noise Considerations....................................................... 5
Low Average Active Power.............................................. 5
Best Practices................................................................... 5
Maximum Ratings............................................................. 7
Operating Range............................................................... 7
DC Electrical Characteristics .......................................... 7
Data Retention and Endurance ....................................... 7
Capacitance ...................................................................... 8
Thermal Resistance.......................................................... 8
AC Test Conditions .......................................................... 8
AC Switching Characteristics ......................................... 9
SRAM Read Cycle ...................................................... 9
Switching Waveforms ...................................................... 9
SRAM Write Cycle..................................................... 10
Switching Waveforms .................................................... 10
STORE INHIBIT or Power Up RECALL ......................... 11
Switching Waveforms .................................................... 11
Software Controlled STORE/RECALL Cycle................ 12
Switching Waveforms .................................................... 12
Part Numbering Nomenclature...................................... 13
Ordering Information...................................................... 13
Package Diagrams.......................................................... 14
Document History Page ................................................. 16
Sales, Solutions, and Legal Information ...................... 17
Worldwide Sales and Design Support....................... 17
Products .................................................................... 17
PSoC Solutions ......................................................... 17
Document Number: 001-50591 Rev. *F
Page 2 of 17




 STK11C88
Pin Configurations
Figure 1. Pin Diagram - 28-Pin SOIC
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(TOP)
28 VCC
27 WE
26 A 13
25 A 8
24 A 9
23 A11
22 OE
21 A10
20 CE
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
STK11C88
Table 1. Pin Definitions - 28-Pin SOIC
Pin Name Alt
I/O Type
Description
A0–A14
DQ0-DQ7
Input
Input or
Output
Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM.
Bidirectional Data I/O lines. Used as input or output lines depending on operation.
WE W
Input
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the
I/O pins is written to the specific address location.
CE E
Input
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the
chip.
OE G
Input
Output Enable, Active LOW. The active LOW OE input enables the data output buffers
during read cycles. Deasserting OE HIGH causes the I/O pins to tristate.
VSS Ground Ground for the Device. The device is connected to the ground of the system.
VCC Power Supply Power Supply Inputs to the Device.
Document Number: 001-50591 Rev. *F
Page 3 of 17



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