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PowerStore nvSRAM. STK15C88 Datasheet

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PowerStore nvSRAM. STK15C88 Datasheet






STK15C88 nvSRAM. Datasheet pdf. Equivalent




STK15C88 nvSRAM. Datasheet pdf. Equivalent





Part

STK15C88

Description

256-Kbit (32 K x 8) PowerStore nvSRAM



Feature


Not recommended for new designs. In prod uction to support ongoing production pr ograms only. STK15C88 256-Kbit (32 K 8) PowerStore nvSRAM 256-Kbit (32 K × 8) PowerStore nvSRAM Features ■ 25 ns and 45 ns Access Times ■ Pin comp atible with Industry Standard SRAMs ■ Automatic Nonvolatile STORE on power l oss ■ Nonvolatile STORE under Softwar e Control ■ Automatic RECALL.
Manufacture

Cypress Semiconductor

Datasheet
Download STK15C88 Datasheet


Cypress Semiconductor STK15C88

STK15C88; to SRAM on Power Up ■ Unlimited Read/ Write Endurance ■ Unlimited RECALL Cy cles ■ 1,000,000 STORE Cycles ■ 100 year Data Retention ■ Single 5 V + 1 0% Power Supply ■ Commercial and Indu strial Temperatures ■ 28-pin (300 mil and 330 mil) SOIC packages ■ RoHS Co mpliance Logic Block Diagram Functiona l Description The Cypress STK15C88 is a 256Kb fast static RAM with a nonv.


Cypress Semiconductor STK15C88

olatile element in each memory cell. The embedded nonvolatile elements incorpor ate QuantumTrap™ technology producing the world’s most reliable nonvolatil e memory. The SRAM provides unlimited r ead and write cycles, while independ .


Cypress Semiconductor STK15C88

.

Part

STK15C88

Description

256-Kbit (32 K x 8) PowerStore nvSRAM



Feature


Not recommended for new designs. In prod uction to support ongoing production pr ograms only. STK15C88 256-Kbit (32 K 8) PowerStore nvSRAM 256-Kbit (32 K × 8) PowerStore nvSRAM Features ■ 25 ns and 45 ns Access Times ■ Pin comp atible with Industry Standard SRAMs ■ Automatic Nonvolatile STORE on power l oss ■ Nonvolatile STORE under Softwar e Control ■ Automatic RECALL.
Manufacture

Cypress Semiconductor

Datasheet
Download STK15C88 Datasheet




 STK15C88
STK15C88
256-Kbit (32 K × 8) PowerStore nvSRAM
256-Kbit (32 K × 8) PowerStore nvSRAM
Features
25 ns and 45 ns Access Times
Pin compatible with Industry Standard SRAMs
Automatic Nonvolatile STORE on power loss
Nonvolatile STORE under Software Control
Automatic RECALL to SRAM on Power Up
Unlimited Read/Write Endurance
Unlimited RECALL Cycles
1,000,000 STORE Cycles
100 year Data Retention
Single 5 V + 10% Power Supply
Commercial and Industrial Temperatures
28-pin (300 mil and 330 mil) SOIC packages
RoHS Compliance
Logic Block Diagram
Functional Description
The Cypress STK15C88 is a 256Kb fast static RAM with a
nonvolatile element in each memory cell. The embedded
nonvolatile elements incorporate QuantumTrap™ technology
producing the world’s most reliable nonvolatile memory. The
SRAM provides unlimited read and write cycles, while
independent, nonvolatile data resides in the highly reliable
QuantumTrap cell. Data transfers from the SRAM to the
nonvolatile elements (the STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM (the RECALL operation) from the nonvolatile memory.
Both the STORE and RECALL operations are also available
under software control.
PowerStore nvSRAM products depend on the intrinsic system
capacitance to maintain system power long enough for an
automatic store on power loss. If the power ramp from 5 volts to
3.6 volts is faster than 10 ms, consider our 14C88 or 16C88 for
more reliable operation.
For a complete list of related documentation, click here.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-50593 Rev. *G
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 20, 2015




 STK15C88
STK15C88
Contents
Pin Configurations ........................................................... 3
Device Operation .............................................................. 4
SRAM Read ....................................................................... 4
SRAM Write ....................................................................... 4
AutoStore Operation ........................................................ 4
Hardware RECALL (Power Up)........................................ 4
Software STORE ............................................................... 4
Software RECALL............................................................. 4
Hardware Protect.............................................................. 5
Noise Considerations....................................................... 5
Low Average Active Power.............................................. 5
Best Practices................................................................... 5
Maximum Ratings............................................................. 7
DC Electrical Characteristics .......................................... 7
Data Retention and Endurance ....................................... 8
Capacitance ...................................................................... 8
Thermal Resistance.......................................................... 8
AC Test Conditions .......................................................... 8
AC Switching Characteristics ......................................... 9
SRAM Read Cycle............................................................. 9
Switching Waveforms ...................................................... 9
SRAM Write Cycle .......................................................... 10
Switching Waveforms .................................................... 10
AutoStore or Power Up RECALL .................................. 11
Switching Waveforms .................................................... 11
Software Controlled STORE/RECALL Cycle................ 12
Ordering Information...................................................... 13
Ordering Code Definitions ......................................... 13
Package Diagrams.......................................................... 14
Acronyms ........................................................................ 16
Document Conventions ................................................. 16
Units of Measure ....................................................... 16
Document History Page ................................................. 17
Sales, Solutions and Legal Information ....................... 18
Worldwide Sales and Design Support....................... 18
Products .................................................................... 18
PSoC® Solutions ...................................................... 18
Cypress Developer Community................................. 18
Technical Support ..................................................... 18
Document Number: 001-50593 Rev. *G
Page 2 of 18




 STK15C88
STK15C88
Pin Configurations
Figure 1. Pin Diagram – 28-pin SOIC
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(TOP)
28 VCC
27 WE
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
Table 1. Pin Definitions – 28-pin SOIC
Pin Name Alt
I/O Type
Description
A0–A14
DQ0-DQ7
Input
Input or
Output
Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM.
Bidirectional Data I/O lines. Used as input or output lines depending on operation.
WE W
Input
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the
I/O pins is written to the specific address location.
CE E
Input
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the
chip.
OE G
Input
Output Enable, Active LOW. The active LOW OE input enables the data output buffers
during read cycles. Deasserting OE HIGH causes the I/O pins to tristate.
VSS Ground Ground for the Device. The device is connected to ground of the system.
VCC Power Supply Power Supply Inputs to the Device.
Document Number: 001-50593 Rev. *G
Page 3 of 18



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