Document
Features
■ 5A,500V,RDS(on)(Max1.6Ω)@VGS=10V ■ Ultra-low Gate Charge(Typical 32nC) ■ Fast Switching Capability ■ 100%Avalanche Tested ■ Maximum Junction Temperature Range(150℃)
WFD5N50
Silicon N-Channel MOSFET
General Description
This Power MO SFET is pro du ced using Winse mi ’s ad van ced plana r stripe, DMOS technology. This latest technology has been especially designed to minimize on-state resistance, have a high rugged avalanche charact er istics. This devices is spe cially well suited for high efficiency switch model power supplies, power factor correction and half bridge and full bridge resonant topology line a electronic lamp ballast.
Absolute Maximum Ratings
Symbol
Parameter
VDSS
Drain Source Voltage
Continuous Drain Current(@Tc=25℃)
ID Continuous Drain Current(@Tc=100℃)
IDM Drain Current Pulsed
VGS Gate to Source Voltage
EAS Single Pulsed Avalanche Energy
EAR Repetitive Avalanche Energy
dv/dt
Peak Diode Recovery dv/dt
Total Power Dissipation(.