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CAT28F002 Dataheets PDF



Part Number CAT28F002
Manufacturers Catalyst Semiconductor
Logo Catalyst Semiconductor
Description 2 Megabit CMOS Boot Block Flash Memory
Datasheet CAT28F002 DatasheetCAT28F002 Datasheet (PDF)

CAT28F002 2 Megabit CMOS Boot Block Flash Memory FEATURES s Fast Read Access Time: 90/120/150 ns s On-Chip Address and Data Latches s Blocked Architecture: s Electronic Signature Licensed Intel second source s 100,000 Program/Erase Cycles and 10 Year Data Retention s Standard Pinouts: — One 16-KB Protected Boot Block • Top or Bottom Locations — Two 8-KB Parameter Blocks — One 96-KB Main Block — One 128-KB Main Block s Hardware Data Protection s Automated Program and Erase Algorithms s Automa.

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CAT28F002 2 Megabit CMOS Boot Block Flash Memory FEATURES s Fast Read Access Time: 90/120/150 ns s On-Chip Address and Data Latches s Blocked Architecture: s Electronic Signature Licensed Intel second source s 100,000 Program/Erase Cycles and 10 Year Data Retention s Standard Pinouts: — One 16-KB Protected Boot Block • Top or Bottom Locations — Two 8-KB Parameter Blocks — One 96-KB Main Block — One 128-KB Main Block s Hardware Data Protection s Automated Program and Erase Algorithms s Automatic Power Savings Feature s Low Power CMOS Operation s 12.0V — 40-Lead TSOP — 40-Lead PDIP s High Speed Programming s Commercial, Industrial and Automotive Tem- perature Ranges s Reset/Deep PowerDown Mode — 0.2µA ICC Typical — Acts as Reset for Boot Operations ± 5% Programming and Erase Voltage DESCRIPTION The CAT28F002 is a high speed 256K X 8-bit electrically erasable and reprogrammable Flash memory ideally suited for applications requiring in-system or after sale code updates. The CAT28F002 has a blocked architecture with one 16 KB Boot Block, two 8 KB Parameter Blocks, one 96 KB Main Block and one 128 KB Main Block. The Boot Block section can be at the top or bottom of the memory map. The Boot Block section includes a reprogramming write lock out feature to guarantee data integrity. It is designed to contain secure code which will bring up the system minimally and download code to other locations of CAT28F002. The CAT28F002 is designed with a signature mode which allows the user to identify the IC manufacturer and device type. The CAT28F002 is also designed with onChip Address Latches, Data Latches, Programming and Erase Algorithms. A deep power-down mode lowers the total Vcc power consumption 1µw typical. The CAT28F002 is manufactured using Catalyst’s advanced CMOS floating gate technology. It is designed to endure 100,000 program/erase cycles and has a data retention of 10 years. The device is available in JEDEC approved 40-pin TSOP and 40-pin PDIP packages. BLOCK DIAGRAM ADDRESS COUNTER WRITE STATE MACHINE RP WE COMMAND REGISTER PROGRAM VOLTAGE SWITCH CE, OE LOGIC ERASE VOLTAGE SWITCH I/O0–I/O7 I/O BUFFERS STATUS REGISTER DATA LATCH COMPARATOR ADDRESS LATCH SENSE AMP CE OE Y-GATING Y-DECODER 16K-BYTE BOOT BLOCK 8K-BYTE PARAMETER BLOCK 8K-BYTE PARAMETER BLOCK 96K-BYTE MAIN BLOCK 128K-BYTE MAIN BLOCK A0–A17 VOLTAGE VERIFY SWITCH X-DECODER 28F002 F01 © 1998 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice 1 Doc. No. 25072-00 2/98 F-1 CAT28F002 PIN CONFIGURATION PDIP Package (P) NC NC A0 CE GND OE I/O0 I/O1 I/O2 I/O3 VCC VCC I/O4 I/O5 I/O6 I/O7 A10 GND A17 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 NC A1 A2 A3 A4 A5 A6 A7 VPP RP WE A8 A9 A11 A12 A13 A14 A15 A16 NC TSOP Package (T) A17 GND NC NC A10 I/O7 I/O6 I/O5 I/O4 VCC VCC NC I/O3 I/O2 I/O1 I/O0 OE GND CE A0 A16 A15 A14 A13 A12 A11 A9 A8 WE RP VPP DU NC A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 PIN FUNCTIONS Pin Name A0–A17 I/O0–I/O7 CE OE WE VCC VSS VPP RP DU Input Type Input I/O Input Input Input Function Address Inputs for memory addressing Data Input/Output Chip Enable Output Enable Write Enable Voltage Supply Ground Program/Erase Voltage Supply Power Down Do Not Use 28F002 F03 Doc. No. 25072-00 2/98 F-1 2 CAT28F002 ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................... –55°C to +95°C Storage Temperature ....................... –65°C to +150°C Voltage on Any Pin with Respect to Ground(1) ........... –2.0V to +VCC + 2.0V Voltage on Pin A9 with Respect to Ground(1) ................... –2.0V to +13.5V VPP with Respect to Ground during Program/Erase(1) .............. –2.0V to +14.0V VCC with Respect to Ground(1) ............ –2.0V to +7.0V Package Power Dissipation Capability (TA = 25°C) .................................. 1.0 W Lead Soldering Temperature (10 secs) ............ 300°C Output Short Circuit Current(2) ........................ 100 mA *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. RELIABILITY CHARACTERISTICS Symbol NEND (3) Parameter Endurance Data Retention ESD Susceptibility Latch-Up Min. 100K 10 2000 100 Max. Units Cycles/Byte Years Volts mA Test Method MIL-STD-883, Test Method 1033 MIL-STD-883, Test Method 1008 MIL-STD-883, Test Method 3015 JEDEC Standard 17 TDR(3) VZAP(3) ILTH(3)(4) CAPACITANCE TA = 25°C, f = 1.0 MHz Limits Symbol CIN(3) COUT(3) CVPP(3) Test Input Pin Capacitance Output Pin Capacitance VPP Supply Capacitance Min Max. 8 12 25 Uni.


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