MITSUBISHI LSIs
M5M4V16169DTP/RT-7,-8,-10,-15
16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
Preliminary This document is a preliminary Target Spec. and some of the contents are subject to change without notice.
DESCRIPTION
PINCONFIGURATION (TOP VIEW)
1. The M5M4V16169DTP/RT is a 16M-bit Cached DRAM which integrates input...
