N & P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS RDSON (MAX.)
N‐...
N & P‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
BVDSS RDSON (MAX.)
N‐CH 40V 35mΩ
P‐CH ‐40V 44mΩ
D1 G1
ID
12A ‐9A
S1
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
D2 G2
S2
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
VGS
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
Power Dissipation
TC = 25 °C TC = 100 °C
Operating Junction & Storage Temperature Range
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction‐to‐Case
RJC
Junction‐to‐Ambient
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1%
2012/11/27
ID IDM PD Tj, Tstg
TYPICAL
EMB35C04A
LIMITS
N‐CH
P‐CH
±20 ±20
...