N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
S2 S2 S2 G2
N‐CH‐Q1 N‐CH‐Q2
...
N‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
S2 S2 S2 G2
N‐CH‐Q1 N‐CH‐Q2
BVDSS
30V
RDSON (MAX.) 9mΩ
30V 4mΩ
D2 / S1
ID 15A 25A
D1
UIS, Rg 100% Tested Pb‐Free Lead Plating & Halogen Free
D1 D1 D1 PIN 1 (G1)
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
EMB04K03HPF
LIMITS
UNIT
Q1 Q2
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
Avalanche Current
Avalanche Energy
L = 0.1mH, RG=25Ω
Repetitive Avalanche Energy2
L = 0.05mH
Power Dissipation
TC = 25 °C TC = 100 °C
Operating Junction & Storage Temperature Range
VGS ID
IDM IAS EAS EAR PD
Tj, Tstg
±20 ±20
15 25
12 18
60 100
15 25
11.25
31.25
5.62
15.62
48 100
19 40 ...
