P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐40V
D
RDSON (MAX.)
...
P‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
BVDSS
‐40V
D
RDSON (MAX.)
16mΩ
ID
‐20A
G
UIS, Rg 100% Tested
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
Avalanche Current
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, ID=‐15A, RG=25Ω L = 0.05mH
Power Dissipation
TA = 25 °C TA = 100 °C
Operating Junction & Storage Temperature Range
VGS ID
IDM IAS EAS EAR PD
Tj, Tstg
EMB16P04V
LIMITS ±20 ‐20 ‐13 ‐80 ‐15 11.25 5.62 2.5 1.25
‐55 to 150
UNIT V A
mJ W °C
THERMAL RESISTANCE RATINGS THERMAL RESISTANCE
SYMBOL
Junction‐to‐Case
...