Dual P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐30V
RDSON (MAX.)...
Dual P‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
BVDSS
‐30V
RDSON (MAX.)
24mΩ
ID ‐8A
UIS, Rg 100% Tested
Pb‐Free Lead Plating
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
EMB24B03G
LIMITS
UNIT
Gate‐Source Voltage
VGS ±25
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
ID IDM
‐8 ‐6 ‐32
Avalanche Current
IAS ‐12
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, ID=‐8A, RG=25Ω L = 0.05mH
EAS EAR
3.2 1.6
Power Dissipation
TA = 25 °C TA = 100 °C
Operating Junction & Storage Temperature Range
PD Tj, Tstg
2 1.1 ‐55 to 150
100% UIS testing in condition of VD=‐15V, L=0.1mH, VG=‐10V, IL=‐8A, Rated VDS=‐30V P‐CH THERMAL RESISTANCE RATI...