N & P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
N‐CH P‐CH
BVDSS RDSON ...
N & P‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
N‐CH P‐CH
BVDSS RDSON (MAX.)
20V ‐20V 45mΩ 100mΩ
ID
4.8A
‐3.4A
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
VGS
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction‐to‐Case
RJC
Junction‐to‐Ambient3
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1% 365°C / W when mounted on a 1 in2 pad of 2 oz copper.
2016/2/17
ID IDM PD Tj, Tstg
TYPICAL
EMF50C02VA
...