N & P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
N‐CH P‐CH
BVDSS RDSON ...
N & P‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
N‐CH P‐CH
BVDSS RDSON (MAX.)
30V ‐30V 21mΩ 50mΩ
ID 8A ‐5A
UIS, Rg 100% Tested
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
EMB50D03G
LIMITS
UNIT
Gate‐Source Voltage
VGS
N‐CH
P‐CH
V
±20 ±20
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Avalanche Current
Avalanche Energy
L = 0.1mH, ID=10A, RG=25Ω(N) L = 0.1mH, ID=‐10A, RG=25Ω(P)
Repetitive Avalanche Energy2
L = 0.05mH
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
ID
IDM IAS EAS
EAR PD Tj, Tstg
8 ‐5 6.4 ‐4 32 ‐20 10 ‐10 5 5
2.5 2.5 2
1.28...
