N & P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
N‐CH P‐CH
BVDSS
20V...
N & P‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
N‐CH P‐CH
BVDSS
20V ‐20V
RDSON (MAX.)
20mΩ 40mΩ
ID 6A ‐5A
UIS, Rg 100% Tested
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
VGS
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 100 °C
Avalanche Current
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, ID=6A, RG=25Ω(N) L = 0.1mH, ID=‐5A, RG=25Ω(P)
L = 0.05mH
Power Dissipation
TA = 25 °C TA = 100 °C
Operating Junction & Storage Temperature Range
THERMAL RESISTANCE RATINGS THERMAL RESISTANCE
SYMBOL
Junction‐to‐Case
RJC
Junction‐to‐Ambient3
RJA
1Pulse width limited by maximum junction temperature....