Document
N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
50V
D
RDSON (MAX.)
3.5mΩ
ID 85A G
UIS, Rg 100% Tested
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
EMD03N05HS
LIMITS
UNIT
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
Avalanche Current
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, ID=75A, RG=25Ω
L = 0.05mH
Power Dissipation
TC = 25 °C TC = 100 °C
Operating Junction & Storage Temperature Range
VGS ID
IDM IAS EAS EAR PD
Tj, Tstg
±20 85 53 240 75 281 140 50 20 ‐55 to 150
V A
mJ W °C
100% UIS testing in condition of VD=30V, L=0.1mH, VG=10V, IL=50A, Rated VDS=50V N-CH THERMAL RESISTANCE RA.