FUJITSU SEMICONDUCTOR DATA SHEET
FLASH MEMORY
CMOS
2M (256K × 8) BIT
DS05-20868-3E
MBM29F002TC-55/-70/-90/MBM29F002BC-55/-70/-90
s FEATURES
• Single 5.0 V read, write, and erase Minimizes system level power requirements
• Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection
• 32-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type) 32-pin PLCC (Package Suffix: PD)
• Minimum 100,000 write/erase cycles • High performance
55 ns maximum access time • Sector erase architecture
One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes Any combination of sectors can be erased. Also supports full chip erase • Boot Code Sector Architecture T = Top sector B = Bottom sector • Embedded Erase™ Algorithms Automatically pre-programs and erases the chip or any sector • Embedded Program™ Algorithms Automatically programs and verifies data at specified address • Da.