MBM29F040A-90

FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 4M (512K × 8) BIT MBM29F040A - 70/-90/-12 DS05–20810–3E s DISTINCTIVE CHARACTERISTICS Single 5.0 V read, write and erase Minimizes system level power requirements Compatible with JEDEC-standard commands Uses same software commands as E2PROMs Compatible with JEDEC-standard byte-wide pinouts 32-pin PLCC (Package suffix: PD) 32-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) Note: If there are special requirements not specified above (such as DIP package), please contact Fujitsu sales office. Minimum 100,000 write/erase cycles High performance 70 ns maximum access time Sector erase architecture 8 equal size sectors of 64K bytes each Any combination of sectors can be concurrently erased. Also supports full chip erase. Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector Embedded ProgramTM Algorithms Automatically writes and verifies...