M28C64

M28C64 64 Kbit (8K x 8) Parallel EEPROM With Software Data Protection NOT FOR NEW DESIGN s Fast Access Time: – 90 ns at VCC=5 V for M28C64 and M28C64-A – 120 ns at VCC=3 V for M28C64-xxW s Single Supply Voltage: – 4.5 V to 5.5 V for M28C64 and M28C64-A – 2.7 V to 3.6 V for M28C64-xxW s Low Power Consumption s Fast BYTE and PAGE WRITE (up to 64 Bytes) – 1 ms at VCC=4.5 V for M28C64-A – 3 ms at VCC=4.5 V for M28C64 – 5 ms at VCC=2.7 V for M28C64-xxW s Enhanced Write Detection and Monitoring: – Ready/Busy Open Drain Output – Data Polling – Toggle Bit – Page Load Timer Status s JEDEC Approved Bytewide Pin-Out s Software Data Protection s 100000 Erase/Write Cycles (minimum) s Data Retention (minimum): – 40 Years for M28C64 and M28C64-xxW – 10 Years for M28C64-A 28 1 PDIP28 (BS) 28 1 SO28 (MS) 300 mil width Figure 1. Logic Diagram VCC PLCC32 (KA) TSOP28 (NS) 8 x 13.4 mm Table 1. Signal Names A0-A12 Address Input DQ0-DQ7 Data Input / Output W Write Enable E...