MACH230-15

FINAL COM’L: -10/15/20 IND: -18/24 MACH230-10/15/20 High-Density EE CMOS Programmable Logic Lattice Semiconductor DISTINCTIVE CHARACTERISTICS 84 Pins 128 Macrocells 10 ns tPD Commercial 18 ns tPD Industrial 100 MHz fCNT 70 Inputs GENERAL DESCRIPTION The MACH230 is a member of the high-performance EE CMOS MACH 2 device family. This device has approximately twelve times the logic macrocell capability of the popular PAL22V10 without loss of speed. The MACH230 consists of eight PAL blocks interconnected by a programmable switch matrix. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently. The MACH230 has two kinds of macrocell: output and buried. The output macrocell provides registered, BLOCK DIAGRAM If you would like to view Block Diagram in full size, please click on the box. 64 Outputs 128 Flip-flops; 4 clock choices 8 ...