function gate. 74AUP2G98 Datasheet

74AUP2G98 gate. Datasheet pdf. Equivalent

Part 74AUP2G98
Description Low-power dual PCB configurable multiple function gate
Feature 74AUP2G98 Low-power dual PCB configurable multiple function gate Rev. 2 — 2 December 2015 Product.
Manufacture nexperia
Datasheet
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74AUP2G98 Low-power dual PCB configurable multiple function 74AUP2G98 Datasheet
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74AUP2G98
74AUP2G98
Low-power dual PCB configurable multiple function gate
Rev. 2 — 2 December 2015
Product data sheet
1. General description
The 74AUP2G98 is a dual configurable multiple function gate with Schmitt-trigger inputs.
Each gate within the device can be configured as any of the following logic functions
MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input. All inputs can be
connected directly to VCC or GND.
This device ensures very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power down applications using IOFF. The IOFF
circuitry disables the output, preventing the potentially damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; ICC = 0.9 A (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C



74AUP2G98
Nexperia
74AUP2G98
Low-power dual PCB configurable multiple function gate
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74AUP2G98DP 40 C to +125 C TSSOP10
74AUP2G98GU 40 C to +125 C XQFN10
74AUP2G98GF 40 C to +125 C XSON10
Description
Version
plastic thin shrink small outline package; 10 leads;
body width 3 mm
SOT552-1
plastic, extremely thin quad flat package; no leads;
10 terminals; body 1.40 1.80 0.50 mm
SOT1160-1
plastic extremely thin small outline package; no leads; SOT1081-2
10 terminals; body 1.0 1.7 0.5 mm
4. Marking
Table 2. Marking
Type number
74AUP2G98DP
74AUP2G98GU
74AUP2G98GF
Marking code[1]
a9
a9
a9
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Q$
Q%
Q&
Fig 1. Logic diagram (one gate)
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DDD
74AUP2G98
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 December 2015
© Nexperia B.V. 2017. All rights reserved
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