Protection Diodes. DF2B20M4SL Datasheet

DF2B20M4SL Diodes. Datasheet pdf. Equivalent

Part DF2B20M4SL
Description ESD Protection Diodes
Feature ESD Protection Diodes Silicon Epitaxial Planar DF2B20M4SL DF2B20M4SL 1. General The DF2B20M4SL is .
Manufacture Toshiba Semiconductor
Datasheet
Download DF2B20M4SL Datasheet

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DF2B20M4SL
ESD Protection Diodes Silicon Epitaxial Planar
DF2B20M4SL
DF2B20M4SL
1. General
The DF2B20M4SL is a bidirectional TVS diode with high VRWM(18.5V)
designed to protect high speed line or differential signal line from the
damage caused by ESD and other transients voltage. This TVS diode
can protect the latter part well by the low dynamic resistance, improve
the system reliability level by the high VESD performance. It is optimum
for antennal application such as NFC for the low capacitance
performance. And the small SOD-962 (0.32 × 0.62 mm) package size is
ideal for high-density mounting.
2. Applications
Mobile Equipment
Smartphones
Tablets
Notebook PCs
Desktop PCs
Note: This product is designed for protection against electrostatic discharge (ESD) and is not intended for any other
purpose, including, but not limited to, voltage regulation.
3. Features
(1) Suitable for high working voltage line. (VRWM 18.5 V)
(2) Protects devices with its high ESD performance.
(VESD = ±15 kV (Contact / Air) @IEC61000-4-2)
(3) Low dynamic resistance protects semiconductor devices from static electricity and noise.
(RDYN = 0.2 (typ.))
(4) Snapback characteristics realizing low clamping voltage protects semiconductor devices.
(VC = 26 V@IPP = 0.5 A (typ.))
(5) Compact package is suitable for use in high density board layouts such as in mobile devices.
(SOD-962: 0.32 × 0.62 mm size (Toshiba package name: SL2))
4. Example of Circuit Diagram
©2016 Toshiba Corporation
1
Start of commercial production
2016-09
2017-02-28
Rev.3.0



DF2B20M4SL
5. Quick Reference Data
DF2B20M4SL
Characteristics
Symbol Note
Test Condition
Min Typ. Max Unit
Working peak reverse voltage
Total capacitance
Dynamic resistance
Electrostatic discharge voltage
(IEC61000-4-2) (Contact)
VRWM
Ct
RDYN
VESD
(Note 1)
VR = 0 V, f = 1 MHz
(Note 2)
(Note 3)
  18.5 V
0.2 0.5 pF
0.2
  15 kV
Note 1: Recommended operating condition.
Note 2: TLP parameters: Z0 = 50 , tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns, extraction of
dynamic resistance using least squares fit of TLP characteristics between IPP1 = 8 A and IPP2 = 16 A.
Note 3: Criterion: No damage to devices.
5.1. ESD Clamp Waveform (Note)
Fig. 5.1.1 +8 kV
Fig. 5.1.2 -8 kV
Fig. 5.1.3 IEC61000-4-2 (Contact)
Note: The above characteristics curves are presented for reference only and not guaranteed by production test,
unless otherwise noted.
©2016 Toshiba Corporation
2
2017-02-28
Rev.3.0





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