MOS FET. FC6A21060L Datasheet

FC6A21060L FET. Datasheet pdf. Equivalent


Part FC6A21060L
Description Gate Resistor installed Dual N-Channel MOS FET
Feature FC6A21060L Gate Resistor installed Dual N-Channel MOS FET For lithium-ion secondary battery protecti.
Manufacture Panasonic
Datasheet
Download FC6A21060L Datasheet


FC6A21060L Gate Resistor installed Dual N-Channel MOS FET Fo FC6A21060L Datasheet
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FC6A21060L
FC6A21060L
Gate Resistor installed Dual N-Channel MOS FET
For lithium-ion secondary battery protection circuit
FC6A21060L
Unit: mm
„ Features
y Low Source-source On-state Resistance:RSS(on)typ. = 8.7 mΩVGS = 4.5 V)
y CSP package:smallest & thinnest size
y Halogen-free / RoHS compliant
(EU RoHS / UL-94 V-0 / MSL:Level 1 compliant)
„ Marking Symbol:31
„ Packaging
FC6A21060L Embossed type (Thermo-compression sealing):
5 000 pcs / reel (standard)
„ Absolute Maximum Ratings Ta = 25 °C
Parameter
Source-source Voltage
FET1 Gate-source Voltage
FET2 Source Current (DC) *1
Source Current (Pulsed) *1,*2
Total Power Dissipation *1
Overall Channel Temperature
Storage Temperature Range
Symbol
VSS
VGS
IS
ISp
PD
Tch
Tstg
Rating
12
±12
6
60
0.45
150
-55 to +150
„ Thermal Characteristics
Parameter
Symbol
Rating
Thermal Resistance, Channel to Ambient
Rth (ch-a)
278
Note *1 Mounted on FR4 board (25.4 mm × 25.4 mm × t1.0 mm).
Surface Mounted on FR4 Board using the minimum recommended
pad size(Cu area = 47 mm2 including traces).
*2 t = 10 μs, Duty Cycle 1 %
Unit
V
V
A
A
W
°C
°C
Unit
°C/W
1. Source (FET1)
2. Gate (FET1)
3. Source (FET1)
4. Source (FET2)
5. Gate (FET2)
6. Source (FET2)
Panasonic
JEITA
Code
MBGA006-W-1723APA
-
-
Internal Connection
FET1
2
FET2
5
1,3 4,6
Pin Name
1. Source (FET1)
2. Gate (FET1)
3. Source (FET1)
4. Source (FET2)
5. Gate (FET2)
6. Source (FET2)
Publication date: October 2012
Ver. BED
1



FC6A21060L
FC6A21060L
„ Electrical Characteristics Ta = 25 °C ± 3 °C
Parameter
Source-source Breakdown Voltage
Zero Gate Voltage source Current
Gate-source Leakage Current
Gate-source Threshold Voltage
Source-source On-State Resistance
Input Capacitance *1
Output Capacitance *1
Reverse Transfer Capacitance *1
Turn-on Delay Time *1,*2
Rise Time *1,*2
Turn-off Delay Time *1,*2
Fall Time *1,*2
Total Gate Charge *1
Gate-source Charge *1
Gate-drain Charge *1
Body Diode Forward Voltage
Note: *1 Assured by design
*2 See Test circuit
Symbol
VSSS
ISSS
IGSS1
IGSS2
IGSS3
IGSS4
IGSS5
IGSS6
IGSS7
Vth
RSS(on)1
RSS(on)2
RSS(on)3
RSS(on)4
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
VF(s-s)
Conditions
IS = 1 mA, VGS = 0 V
VSS = 12 V, VGS = 0 V
VGS = ±5.0 V, VSS = 0 V
VGS = ±4.3 V, VSS = 0 V
VGS = ±4.1 V, VSS = 0 V
VGS = ±3.8 V, VSS = 0 V
VGS = ±3.5 V, VSS = 0 V
VGS = ±3.0 V, VSS = 0 V
VGS = ±2.5 V, VSS = 0 V
IS = 1.0 mA, VSS = 10.0 V
IS = 3.5 A, VGS = 4.5 V
IS = 3.5 A, VGS = 3.8 V
IS = 3.5 A, VGS = 3.1 V
IS = 3.5 A, VGS = 2.5 V
VSS = 10 V, VGS = 0 V, f = 1MHz
VDD = 10 V, VGS = 0 to 4.0 V
IS = 3.5 A
VDD = 10 V, VGS = 4.0 to 0 V
IS = 3.5 A
VDD = 10 V, VGS = 0 to 4.0 V
IS = 6 A
IF = 6.0 A, VGS = 0 V
DEDSETSRTURCUTCIOTNIOCNUCRURRERNETNT
Min Typ Max
12
1.0
±0.50 ±1.0
±0.25 ±0.5
±0.20 ±0.4
±0.18 ±0.36
±0.15 ±0.3
±0.10 ±0.2
±0.05 ±0.1
0.4 0.85 1.4
6.0 8.7 12.0
6.5 9.0 12.5
7.0 10.5 15.5
8.0 12.5 19.0
2 300
680
670
5.2
19.0
3.5
8.2
30.0
6.5
10.0
0.8 1.2
Unit
V
μA
μA
V
mΩ
pF
μs
μs
nC
V
Operation test
Destruction current
Condition
VGS = 3.8 V
t = 3 ms, IS = 40 A
VGS = 3.8 V
t = 11 ms, IS = 15 A
VGS = 3.8 V
t = 3 ms
VGS = 3.8 V
t = 11 ms
Ta = 25 °C,
Mounted on FR4 board (25.4 × 25.4 × t1.0 mm)
Surface Mounted on FR4 Board using the minimum recommended
pad size (Cu area = 47 mm2 including traces)
Result
PASS
PASS
95 A
63 A
Ver. BED
2







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