buffer/line driver. 74LVCH16541A Datasheet

74LVCH16541A driver. Datasheet pdf. Equivalent

74LVCH16541A Datasheet
Recommendation 74LVCH16541A Datasheet
Part 74LVCH16541A
Description 16-bit buffer/line driver
Feature 74LVCH16541A; 74LVCH16541A 16-bit buffer/line driver; 3-state Rev. 4 — 1 May 2019 Product data sheet 1. General .
Manufacture nexperia
Datasheet
Download 74LVCH16541A Datasheet




nexperia 74LVCH16541A
74LVCH16541A
16-bit buffer/line driver; 3-state
Rev. 4 — 1 May 2019
Product data sheet
1. General description
The 74LVCH16541A is a 16-bit buffer/line driver with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs (1OEn and 2OEn). A HIGH on nOEn causes the outputs to
assume a high-impedance OFF-state.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to
the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.
Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
2. Features and benefits
5 Volt tolerant inputs and outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low-power consumption
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
High-impedance outputs when VCC = 0 V
All data inputs have bus hold
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C.
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74LVCH16541ADGG -40 to +125 °C
Name
TSSOP48
Description
Version
plastic thin shrink small outline package; 48 leads; SOT362-1
body width 6.1 mm



nexperia 74LVCH16541A
Nexperia
4. Functional diagram
1OE1
1OE2
2OE1
2OE2
1
48
24
25
&
EN
&
A0 47
A1 46
A2 44
A3 43
A4 41
A5 40
A6 38
A7 37
A0 36
A1 35
A2 33
A3 32
A4 30
A5 29
A6 27
A7 26
11
22
mna057
2 1Y0
3 1Y1
5 1Y2
6 1Y3
8 1Y4
9 1Y5
11 1Y6
12 1Y7
13 2Y0
14 2Y1
16 2Y2
17 2Y3
19 2Y4
20 2Y5
22 2Y6
23 2Y7
Fig. 1. IEC logic symbol
VCC
data
input
Fig. 3. Bus hold circuit
74LVCH16541A
16-bit buffer/line driver; 3-state
1A0 47
1A1 46
1A2 44
1A3 43
1A4 41
1A5 40
1A6 38
1A7 37
2 1Y0
3 1Y1
2A0 36
2A1 35
5 1Y2
6 1Y3
2A2 33
2A3 32
8 1Y4
2A4 30
9 1Y5
2A5 29
11 1Y6
2A6 27
12 1Y7
2A7 26
1OE1 1
1OE2 48
Fig. 2. Logic diagram
2OE1 24
2OE2 25
13 2Y0
14 2Y1
16 2Y2
17 2Y3
19 2Y4
20 2Y5
22 2Y6
23 2Y7
mna056
to internal circuit
mna004
74LVCH16541A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 May 2019
© Nexperia B.V. 2019. All rights reserved
2 / 12



nexperia 74LVCH16541A
Nexperia
5. Pinning information
74LVCH16541A
16-bit buffer/line driver; 3-state
5.1. Pinning
74LVCH16541A
1OE1 1
1Y0 2
1Y1 3
GND 4
1Y2 5
1Y3 6
VCC 7
1Y4 8
1Y5 9
GND 10
1Y6 11
1Y7 12
2Y0 13
2Y1 14
GND 15
2Y2 16
2Y3 17
VCC 18
2Y4 19
2Y5 20
GND 21
2Y6 22
2Y7 23
2OE1 24
Fig. 4. Pin configuration SOT362-1 (TSSOP48)
48 1OE2
47 1A0
46 1A1
45 GND
44 1A2
43 1A3
42 VCC
41 1A4
40 1A5
39 GND
38 1A6
37 1A7
36 2A0
35 2A1
34 GND
33 2A2
32 2A3
31 VCC
30 2A4
29 2A5
28 GND
27 2A6
26 2A7
25 2OE2
mna055
5.2. Pin description
Table 2. Pin description
Name
1OE1
1OE2
2OE1
2OE2
GND
VCC
1Y0, 1Y1, 1Y2, 1Y3, 1Y4, 1Y5, 1Y6, 1Y7
2Y0, 2Y1, 2Y2, 2Y3, 2Y4, 2Y5, 2Y6 2Y7
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7
Pin
1
48
24
25
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
2, 3, 5, 6, 8, 9, 11, 12
13, 14, 16, 17, 19, 20, 22, 23
47, 46, 44, 43, 41, 40, 38, 37
36, 35, 33, 32, 30, 29, 27, 26
Description
output enable input (active LOW)
output enable input (active LOW)
output enable input (active LOW)
output enable input (active LOW)
ground (0 V)
positive supply voltage
data output
data output
data input
data input
74LVCH16541A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 May 2019
© Nexperia B.V. 2019. All rights reserved
3 / 12







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