Flash Memory. AT49LV002 Datasheet

AT49LV002 Datasheet PDF, Equivalent


Part Number

AT49LV002

Description

2-Megabit 256K x 8 Single 2.7-Volt Battery-Voltage Flash Memory

Manufacture

ATMEL

Total Page 26 Pages
PDF Download
Download AT49LV002 Datasheet PDF


AT49LV002 Datasheet
Features
Single Supply for Read and Write: 2.7 to 3.6V (BV), 3.0 to 3.6V (LV)
Fast Read Access Time – 70 ns
Internal Program Control and Timer
Sector Architecture
– One 16K Bytes Boot Block with Programming Lockout
– Two 8K Bytes Parameter Blocks
– Two Main Memory Blocks (96K, 128K Bytes)
Fast Erase Cycle Time – 10 Seconds
Byte-by-Byte Programming – 30 µs/Byte Typical
Hardware Data Protection
DATA Polling for End of Program Detection
Low Power Dissipation
– 25 mA Active Current
– 50 µA CMOS Standby Current
Typical 10,000 Write Cycles
Description
The AT49BV/LV002(N)(T) is a 3-volt-only in-system reprogrammable Flash Memory.
Its 2 megabits of memory is organized as 262,144 words by 8 bits. Manufactured with
Atmel’s advanced nonvolatile CMOS technology, the device offers access times to
70 ns with power dissipation of just 90 mW over the commercial temperature range.
Pin Configurations
Pin Name Function
A0 - A17
Addresses
CE Chip Enable
OE Output Enable
WE
RESET
Write Enable
RESET
I/O0 - I/O7 Data Inputs/Outputs
DC Don’t Connect
PLCC Top View
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
I/O0 13
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 I/O7
DIP Top View
*RESET
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 WE
30 A17
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
VSOP Top View (8 x 14 mm) or
TSOP Top View (8 x 20 mm)
Type 1
A11
A9
A8
A13
A14
A17
WE
VCC
*RESET
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 OE
31 A10
30 CE
29 I/O7
28 I/O6
27 I/O5
26 I/O4
25 I/O3
24 GND
23 I/O2
22 I/O1
21 I/O0
20 A0
19 A1
18 A2
17 A3
2-megabit
(256K x 8)
Single 2.7-volt
Battery-Voltage
Flash Memory
AT49BV002
AT49LV002
AT49BV002N
AT49LV002N
AT49BV002T
AT49LV002T
AT49BV002NT
AT49LV002NT
Not Recommended
for New Design
Contact Atmel to discuss
the latest design in trends
and options
Note: *This pin is a DC on the AT49BV002N(T) and AT49LV002N(T).
Rev. 0982D–FLASH–02/03
1

AT49LV002 Datasheet
Block Diagram
When the device is deselected, the CMOS standby current is less than 50 µA. For the
AT49BV/LV002N(T) pin 1 for the DIP and PLCC packages and pin 9 for the TSOP package
are don’t connect pins. To allow for simple in-system reprogrammability, the
AT49BV/LV002(N)(T) does not require high input voltages for programming. Five-volt-only
commands determine the read and programming operation of the device. Reading data out of
the device is similar to reading from an EPROM; it has standard CE, OE, and WE inputs to
avoid bus contention. Reprogramming the AT49BV/LV002(N)(T) is performed by erasing a
block of data and then programming on a byte by byte basis. The byte programming time is a
fast 50 µs. The end of a program cycle can be optionally detected by the DATA polling feature.
Once the end of a byte program cycle has been detected, a new access for a read or program
can begin. The typical number of program and erase cycles is in excess of 10,000 cycles.
The device is erased by executing the erase command sequence; the device internally con-
trols the erase operations. There are two 8K byte parameter block sections and two main
memory blocks.
The device has the capability to protect the data in the boot block; this feature is enabled by a
command sequence. The 16K-byte boot block section includes a reprogramming lock out fea-
ture to provide data integrity. The boot sector is designed to contain user secure code, and
when the feature is enabled, the boot sector is protected from being reprogrammed.
In the AT49BV/LV002N(T), once the boot block programming lockout feature is enabled, the
contents of the boot block are permanent and cannot be changed. In the AT49BV/LV002(T),
once the boot block programming lockout feature is enabled, the contents of the boot block
cannot be changed with input voltage levels of 5.5 volts or less.
VCC
GND
OE
WE
CE
RESET
ADDRESS
INPUTS
CONTROL
LOGIC
Y DECODER
X DECODER
AT49BV/LV002(N)
DATA INPUTS/OUTPUTS
I/O7 - I/O0
8
INPUT/OUTPUT
BUFFERS
PROGRAM
DATA LATCHES
Y-GATING
MAIN MEMORY
BLOCK 2
(128K BYTES)
MAIN MEMORY
BLOCK 1
(96K BYTES)
PARAMETER
BLOCK 2
(8K BYTES)
PARAMETER
BLOCK 1
(8K BYTES)
BOOT BLOCK
(16K BYTES)
3FFFF
20000
1FFFF
08000
07FFF
06000
05FFF
04000
03FFF
00000
AT49BV/LV002(N)T
DATA INPUTS/OUTPUTS
I/O7 - I/O0
8
INPUT/OUTPUT
BUFFERS
PROGRAM
DATA LATCHES
Y-GATING
BOOT BLOCK
(16K BYTES)
PARAMETER
BLOCK 1
(8K BYTES)
PARAMETER
BLOCK 2
(8K BYTES)
MAIN MEMORY
BLOCK 1
(96K BYTES)
MAIN MEMORY
BLOCK 2
(128K BYTES)
3FFFF
3C000
3BFFF
3A000
39FFF
38000
37FFF
20000
1FFFF
00000
2 AT49BV/LV002(N)(T)
0982D–FLASH–02/03


Features Datasheet pdf Features • Single Supply for Read and Write: 2.7 to 3.6V (BV), 3.0 to 3.6V (L V) • Fast Read Access Time – 70 ns • Internal Program Control and Timer • Sector Architecture – One 16K Byt es Boot Block with Programming Lockout – Two 8K Bytes Parameter Blocks – T wo Main Memory Blocks (96K, 128K Bytes) • Fast Erase Cycle Time – 10 Secon ds • Byte-by-Byte Programming – 30 µs/Byte Typical • Hardware Data Prot ection • DATA Polling for End of Prog ram Detection • Low Power Dissipation – 25 mA Active Current – 50 µA CM OS Standby Current • Typical 10,000 W rite Cycles Description The AT49BV/LV0 02(N)(T) is a 3-volt-only in-system rep rogrammable Flash Memory. Its 2 megabit s of memory is organized as 262,144 wor ds by 8 bits. Manufactured with Atmel s advanced nonvolatile CMOS technology , the device offers access times to 70 ns with power dissipation of just 90 mW over the commercial temperature range. I/O1 14 I/O2 15 GND 16 I/O3 17 I/O4 18 I/O5 19 I/O6 20 Pin C.
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